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Can the AM3352 run successfully in a DRAM-less configuration?

Other Parts Discussed in Thread: AM3352, AM3359

I have a customer that would like to run the AM3352 solely from Flash memory – boot and execution - i.e. with no DRAM hooked up.  This customer has a very cost sensitive design – the lo-end sku of their design. They also have a hi- and mid-level versions of this design that they also want to use SKUs of the AM335x MPU.  They’d really like to keep the tools, code, etc common for all three performance levels. 

I have 3 specific questions re: this configuration:

1)  Is running the AM3352 in DRAM-less configuration possible?

2)  If the above is possible, can it be achieved via parallel NAND, SPI NAND or both?

3)  What would be the performance penalty running solely out of Flash memory?  i.e. what would be the approx DMIPS performance when executing out of NAND Flash?

  • 1. Yes, it is possible.

    2. If is possible to run from flash with parallel NOR. With SPI flash, it is not possible because the memory is not random access memory. Similarly, with NAND, it will be possible only if the memory is random access... Basically, the flash should not require a specific procedure such as setting block address and command issues type sequences. SPI, NAND, MMC/SD have such requirement. Parallel NOR does not require this and so it is best candidate.In future, quad-SPI type peripherals are likely to become available and they will allow such capability with quad-serial flash also.

    3. It depends. There is significant sized L2 cache in AM3352. So, it may not be bad at all. On the other hand, DRAM is faster than any flash out there... so it will perform better.

    We have examples of DDR less operation in AM3359 ICE board.

    Thanks.

    Maneesh