Hello,
In the C6748 Technical Reference Manual (http://www.ti.com/lit/ug/spruh79a/spruh79a.pdf) page 501 references interrupts
EDMA3_0_CC0_INT0, EDMA3_0_CC0_INT1, EDMA3_0_CC0_INT2, EDMA3_0_CC0_INT3, EDMA3_0_CC0_ERRINT and
EDMA3_1_CC0_INT0, EDMA3_1_CC0_INT1, EDMA3_1_CC0_INT2, EDMA3_1_CC0_INT3, EDMA3_1_CC0_ERRINT while in interrupts.h the EDMA interrupts available are:
/* EDMA Interrupts */
#define SYS_INT_EDMA3_0_CC0_INT1 8
#define SYS_INT_EDMA3_0_CC0_ERRINT 56
#define SYS_INT_EDMA3_0_TC0_ERRINT 57
#define SYS_INT_EDMA3_0_TC1_ERRINT 58
#define SYS_INT_EDMA3_1_CC0_INT1 91
#define SYS_INT_EDMA3_1_CC0_ERRINT 92
#define SYS_INT_EDMA3_1_TC0_ERRINT 93
Page 531 shows dashed lines instead of actual interrupt number. Are those not existent in CPU?
If we enable for CC0 both TC0 and TC1 how can I distinguish which transfer controller generated the interrupt? Is it with EDMA3GetIntrStatus and EDMA3IntrStatusHighGet?
I noticed in interrupts.h file that interrupts number 76, 77, 98 - 112, 114, 115, 124-128 are not defined. What interrupt sources correspond to?
Thank you in advance,
David.