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Using the PCIE LLD Example Driver with a Switch

abdel abdou
Prodigy 135 points

Hello,

I have a system with a PCIE switch and 2 C6678 EVM boards connected to its ports .. actually the PC is the root complex (RC) (which performs enumerations of attached devices) and the 2 C6678 boards are considered as end-points (EP) ..

My question is : how could I alter the PCIE LLD example to perform a communication bewteen the 2 C6678 boards ?

I know that the provided example is configured by default to establish a communication between a RC and an EP (peer-to-peer). What if I changed the code so that both are EPs, with one device sending data and the other listening for data arrival ? could that configuration works ?

Thanks a lot for your help

  • 0
    Prodigy 135 points

    Hello again,

    I tried to modify the PCIE LLD example so that one end-point sends data from a source buffer and the other end-point waiting for the destination buffer to be full; I changed the inbound and outbound base addresses as being 0xF3700000 and 0xF3600000 in both DSPs, as the PC (root-complex) affected the base/limit register in one Switch port to 0xF360 (for both of the base and the limit) and 0xF370 in the other port.

    I first started the program on one EP to get listening for data being received, the "link was up" and everything seems normal, but when I launch the other program so as to send data to the other attached end-point, nothing is received (the "link was up" in the transmission side as well) .. In the switch, serveral errors were detected, including a "fatal error" in the port of the Switch from where we send data ..

    Is it a problem in the LLD software example or in the Switch ? I did an additional test in the same system, adding an FPGA as end-point (still having the PC as a root-complex), and using the WinDriver software we are able to communicate (reads/writes) with the FPGA through the PCIE switch, does that mean the problem doesn't come from the Switch configurations ? ..

    If I decide that the root-complex will be one of the DSPs, what are other configurations to be made manually, beside affecting IDs and bases/limits (enumeration) .. assuming that the provided LLD example doesn't do the enumeration process ..

    Please someone to help ?

    Thanks

  • 0 in reply to abdel abdou
    Mastermind 6240 points

    Hi Abdel,

    I think that to perform communication between two end-points you need to use a root-complex, in this case the PC. So you would send data from one DSP (end-point) to the PC (root-complex) and from the PC to the other DSP (end-point).

    But I have a question, did your PC recognize the DSP as a device? Can you send data from PC to DSP to PC? If so, how did you achieve that?

    Thanks

  • 0 in reply to Johannes
    Prodigy 135 points

    Johannes, the PC actually sees the 2 DSPs as PCIE devices through the Switch .. You can use the WinDriver library/software from PC to perform reads/writes to PCIE devices, however, it worked with an FPGA but not yet succeding a communication : PC with the TI DSP .. when I execute the LLD PCIE example, the PC software gets blocked when trying to write/read a register, I do not know if I have missed something while modifying the LLD example for this context (inbound/outbound addresses, etc ...)

    I prefer to have the 2 DSPs as end-points, and the PC a root-complex .. then, so as to send data between 2 end-points, I understand that it is enough to update addresses so that the destination is the other end-point, and then passing data to the root-complex first should be done automatically ?

  • 0 in reply to abdel abdou
    Mastermind 6240 points

    Hi,

    I wonder if anyone has succeeded in communicating the DSP with PC, until now I didn't see it in the forum =(

    About communicating the two endpoints, I think the PCIe standard doesn't allow you to do that. You'd have to explicitily estabilish the two communications DSP1-PC and DSP2-PC, but I'm not a PCIe expert. One of TI's guys could answer it better.

    Regards