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Other Parts Discussed in Thread: AM3354
Hi,
I'm using nand flash (MT29F2G08ABAEAWP) to boot my device. when booting the kernel image and file system, in the middle of booting process, the kernel panic with error VFS: Cannot open root device "ubi0:rootfs" or unknown-block(0,0).
What is this error message mean?
is it because the nand flash setting not correct ?
or my kernel configuration not correct?
Thanks and Regards
Keldy
Hi Keldy,
Make sure that your bootargs have proper location to filesystem otherwise we see these kind of errors.
If your bootargs have correct location for filesystem then check whether the filesystem is working correctly, means
1. If you are using SD card then make sure that SD card is formated correctly and partition two have filesystem.
2. If you are using NFS filesystem then make sure that NFS is up an running, nfs server ip is correct in bootargs and check whether the network working condition?
Can you provide bootargs and bootlog for more pointers?
Regards
AnilKumar
Please mark this Forum post as answered via the Verify Answer button below if it helps answer your question. Thanks!
Hi,
I using nand flash to boot with UBIFS method. i using mtd-utils 1.5 version to create my file system image and flashing to nand flash. The file system (targetNFS folder) can boot over network sucessfully.
here i attach my boot log and my u-boot enviroment parameter.
Thanks and Regards
Keldy
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootfile=uImage\0" \
"loadaddr=0x82000000\0" \
"script_addr=0x81900000\0" \
"console=ttyO0,115200n8\0" \
"mmc_dev=0\0" \
"mmc_root=/dev/mmcblk0p2 rw\0" \
"nand_root=ubi0:rootfs r ubi.mtd=7,2048\0" \
"spi_root=/dev/mtdblock4 rw\0" \
"nor_root=/dev/mtdblock3 rw\0" \
"mmc_root_fs_type=ext3 rootwait\0" \
"nand_root_fs_type=ubifs rootwait=1\0" \
"spi_root_fs_type=jffs2\0" \
"nor_root_fs_type=jffs2\0" \
"nand_src_addr=0x280000\0" \
"spi_src_addr=0x62000\0" \
"nor_src_addr=0x08080000\0" \
"nand_img_siz=0x500000\0" \
"spi_img_siz=0x280000\0" \
"nor_img_siz=0x280000\0" \
"spi_bus_no=0\0" \
"rootpath=/export/rootfs\0" \
"nfsopts=nolock\0" \
"static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \
"::off\0" \
"ip_method=dhcp\0" \
"bootenv=uEnv.txt\0" \
"loadbootenv=fatload mmc ${mmc_dev} ${loadaddr} ${bootenv}\0" \
"importbootenv=echo Importing environment from mmc ...; " \
"env import -t $loadaddr $filesize\0" \
"mmc_load_uimage=fatload mmc ${mmc_dev} ${loadaddr} ${bootfile}\0" \
"optargs=\0" \
"bootargs_defaults=setenv bootargs " \
"console=${console} " \
"${optargs}\0" \
"mmc_args=run bootargs_defaults;" \
"setenv bootargs ${bootargs} " \
"root=${mmc_root} " \
"rootfstype=${mmc_root_fs_type} ip=${ip_method}\0" \
"nand_args=run bootargs_defaults;" \
"setenv bootargs ${bootargs} " \
"root=${nand_root} noinitrd " \
"rootfstype=${nand_root_fs_type} ip=${ip_method}\0" \
"spi_args=run bootargs_defaults;" \
"setenv bootargs ${bootargs} " \
"root=${spi_root} " \
"rootfstype=${spi_root_fs_type} ip=${ip_method}\0" \
"nor_args=run bootargs_defaults;" \
"setenv bootargs ${bootargs} " \
"root={nor_root} " \
"rootfstype=${nor_root_fs_type} ip=${ip_method}\0" \
"net_args=run bootargs_defaults;" \
"setenv bootargs ${bootargs} " \
"root=/dev/nfs " \
"nfsroot=${serverip}:${rootpath},${nfsopts} rw " \
"ip=${ip_method} " \
"init=/sbin/init " \
"rdinit=/sbin/init\0" \
"mmc_boot=run mmc_args; " \
"run mmc_load_uimage; " \
"bootm ${loadaddr}\0" \
"nand_boot=echo Booting from nand ...; " \
"mii write 0 B 8104; "\
"mii write 0 C A7A7; "\
"mii write 0 B 8105; "\
"mii write 0 C 0000; "\
"run nand_args; " \
"nandecc hw 2; " \
"nand read.i ${loadaddr} ${nand_src_addr} ${nand_img_siz}; " \
"bootm ${loadaddr}\0" \
"spi_boot=echo Booting from spi ...; " \
"run spi_args; " \
"sf probe ${spi_bus_no}:0; " \
"sf read ${loadaddr} ${spi_src_addr} ${spi_img_siz}; " \
"bootm ${loadaddr}\0" \
"nor_boot=echo Booting from NOR ...; " \
"run nor_args; " \
"cp.b ${0x08080000} ${loadaddr} ${nor_img_siz}; " \
"bootm ${loadaddr}\0" \
"net_boot=echo Booting from network ...; " \
"setenv autoload no; " \
"dhcp; " \
"tftp ${loadaddr} ${bootfile}; " \
"run net_args; " \
"bootm ${loadaddr}\0" \
"cc_boot=echo ChunChoon Configuration ...; " \
"setenv loadaddr 0x82000000 ;" \
"setenv bootfile uImage ;" \
"setenv serverip 141.183.191.166 ;" \
"setenv rootpath /home/chunchoon/ti-sdk-am335x-evm-05.03.00.00/targetNFS\0" \
#define CONFIG_BOOTCOMMAND \
"if mmc rescan; then " \
"echo SD/MMC found on device ${mmc_dev};" \
"if run loadbootenv; then " \
"echo Loaded environment from ${bootenv};" \
"run importbootenv;" \
"fi;" \
"if test -n $uenvcmd; then " \
"echo Running uenvcmd ...;" \
"run uenvcmd;" \
"fi;" \
"if run mmc_load_uimage; then " \
"run mmc_args;" \
"bootm ${loadaddr};" \
"fi;" \
"fi;" \
"run nand_boot;" \
#define CONFIG_MISC_INIT_R
#define CONFIG_SYS_AUTOLOAD "yes"
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_ECHO
[ 0.000000] Linux version 3.2.0 (root@myreka-mm) (gcc version 4.5.3 20110311 (prerelease) (GCC) ) #2 Tue Jun 26 17:15:13 CIT 2012 [ 0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c53c7d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache [ 0.000000] Machine: am335xevm [ 0.000000] Memory policy: ECC disabled, Data cache writeback [ 0.000000] AM335X ES1.0 (sgx neon ) [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 65024 [ 0.000000] Kernel command line: console=ttyO0,115200n8 root=ubi0:rootfs r ubi.mtd=7,2048 noinitrd rootfstype=ubifs rootwait=1 ip=dhp [ 0.000000] PID hash table entries: 1024 (order: 0, 4096 bytes) [ 0.000000] Dentry cache hash table entries: 32768 (order: 5, 131072 bytes) [ 0.000000] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes) [ 0.000000] Memory: 256MB = 256MB total [ 0.000000] Memory: 253420k/253420k available, 8724k reserved, 0K highmem [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB) [ 0.000000] vmalloc : 0xd0800000 - 0xff000000 ( 744 MB) [ 0.000000] lowmem : 0xc0000000 - 0xd0000000 ( 256 MB) [ 0.000000] modules : 0xbf000000 - 0xc0000000 ( 16 MB) [ 0.000000] .text : 0xc0008000 - 0xc0581000 (5604 kB) [ 0.000000] .init : 0xc0581000 - 0xc05bd000 ( 240 kB) [ 0.000000] .data : 0xc05be000 - 0xc061b7e8 ( 374 kB) [ 0.000000] .bss : 0xc061b80c - 0xc0648624 ( 180 kB) [ 0.000000] NR_IRQS:396 [ 0.000000] IRQ: Found an INTC at 0xfa200000 (revision 5.0) with 128 interrupts [ 0.000000] Total of 128 interrupts on 1 active controller [ 0.000000] OMAP clockevent source: GPTIMER2 at 24000000 Hz [ 0.000000] omap_dm_timer_switch_src: Switching to HW default clocksource(sys_clkin_ck) for timer1, this may impact timekeeping in le [ 0.000000] OMAP clocksource: GPTIMER1 at 24000000 Hz [ 0.000000] sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 178956ms [ 0.000000] Console: colour dummy device 80x30 [ 0.000235] Calibrating delay loop... 498.89 BogoMIPS (lpj=2494464) [ 0.056310] pid_max: default: 32768 minimum: 301 [ 0.056467] Security Framework initialized [ 0.056598] Mount-cache hash table entries: 512 [ 0.057059] CPU: Testing write buffer coherency: ok [ 0.078501] omap_hwmod: gfx: failed to hardreset [ 0.095279] omap_hwmod: pruss: failed to hardreset [ 0.096699] print_constraints: dummy: [ 0.097160] NET: Registered protocol family 16 [ 0.099968] OMAP GPIO hardware version 0.1 [ 0.103506] omap_mux_init: Add partition: #1: core, flags: 0 [ 0.106517] omap_i2c.1: alias fck already exists [ 0.107742] omap2_mcspi.1: alias fck already exists [ 0.108036] omap2_mcspi.2: alias fck already exists [ 0.108389] edma.0: alias fck already exists [ 0.108420] edma.0: alias fck already exists [ 0.108447] edma.0: alias fck already exists [ 0.142729] bio: create slab <bio-0> at 0 [ 0.145671] SCSI subsystem initialized [ 0.147915] usbcore: registered new interface driver usbfs [ 0.148355] usbcore: registered new interface driver hub [ 0.148634] usbcore: registered new device driver usb [ 0.149008] registerd cppi-dma Intr @ IRQ 17 [ 0.149028] Cppi41 Init Done Qmgr-base(d083a000) dma-base(d0838000) [ 0.149043] Cppi41 Init Done [ 0.149089] musb-ti81xx musb-ti81xx: musb0, board_mode=0x1, plat_mode=0x1 [ 0.149463] musb-ti81xx musb-ti81xx: musb1, board_mode=0x1, plat_mode=0x0 [ 0.150975] omap_i2c omap_i2c.1: bus 1 rev2.4.0 at 100 kHz [ 0.152853] tps65910 1-002d: could not be detected [ 0.153515] Advanced Linux Sound Architecture Driver Version 1.0.24. [ 0.155000] Switching to clocksource gp timer [ 0.176665] musb-hdrc: version 6.0, ?dma?, otg (peripheral+host) [ 0.176841] USB: Trying to read configuration from [0x474010e8] [ 0.176866] USB: Remapped to [0xd081e0e8] [ 0.176881] USB: Before : Value in register [0xd081e0e8] is [0x100] [ 0.176897] USB: After : Value in register [0xd081e0e8] is [0x80] [ 0.176913] USB: Complete : Value in register [0xd081e0e8] is [0x80] [ 0.176966] musb-hdrc musb-hdrc.0: dma type: dma-cppi41 [ 0.177927] musb-hdrc musb-hdrc.0: MUSB HDRC host driver [ 0.178068] musb-hdrc musb-hdrc.0: new USB bus registered, assigned bus number 1 [ 0.178234] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002 [ 0.178256] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [ 0.178276] usb usb1: Product: MUSB HDRC host driver [ 0.178291] usb usb1: Manufacturer: Linux 3.2.0 musb-hcd [ 0.178306] usb usb1: SerialNumber: musb-hdrc.0 [ 0.179409] hub 1-0:1.0: USB hub found [ 0.179448] hub 1-0:1.0: 1 port detected [ 0.180217] musb-hdrc musb-hdrc.0: USB Host mode controller at d081c000 using DMA, IRQ 18 [ 0.180413] USB: Trying to read configuration from [0x474010e8] [ 0.180435] USB: Remapped to [0xd08340e8] [ 0.180449] USB: Before : Value in register [0xd08340e8] is [0x0] [ 0.180464] USB: After : Value in register [0xd08340e8] is [0x80] [ 0.180480] USB: Complete : Value in register [0xd08340e8] is [0x80] [ 0.180522] musb-hdrc musb-hdrc.1: dma type: dma-cppi41 [ 0.181442] musb-hdrc musb-hdrc.1: MUSB HDRC host driver [ 0.181505] musb-hdrc musb-hdrc.1: new USB bus registered, assigned bus number 2 [ 0.181629] usb usb2: New USB device found, idVendor=1d6b, idProduct=0002 [ 0.181650] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [ 0.181669] usb usb2: Product: MUSB HDRC host driver [ 0.181684] usb usb2: Manufacturer: Linux 3.2.0 musb-hcd [ 0.181700] usb usb2: SerialNumber: musb-hdrc.1 [ 0.182765] hub 2-0:1.0: USB hub found [ 0.182800] hub 2-0:1.0: 1 port detected [ 0.183551] musb-hdrc musb-hdrc.1: USB OTG mode controller at d0832800 using DMA, IRQ 19 [ 0.184083] NET: Registered protocol family 2 [ 0.184322] IP route cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.184697] TCP established hash table entries: 8192 (order: 4, 65536 bytes) [ 0.184921] TCP bind hash table entries: 8192 (order: 3, 32768 bytes) [ 0.185129] TCP: Hash tables configured (established 8192 bind 8192) [ 0.185148] TCP reno registered [ 0.185166] UDP hash table entries: 256 (order: 0, 4096 bytes) [ 0.185199] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes) [ 0.185450] NET: Registered protocol family 1 [ 0.185780] RPC: Registered named UNIX socket transport module. [ 0.185800] RPC: Registered udp transport module. [ 0.185813] RPC: Registered tcp transport module. [ 0.185826] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.186141] NetWinder Floating Point Emulator V0.97 (double precision) [ 0.199634] VFS: Disk quotas dquot_6.5.2 [ 0.199721] Dquot-cache hash table entries: 1024 (order 0, 4096 bytes) [ 0.200427] JFFS2 version 2.2. (NAND) (SUMMARY) � 2001-2006 Red Hat, Inc. [ 0.200848] msgmni has been set to 494 [ 0.201827] io scheduler noop registered [ 0.201845] io scheduler deadline registered [ 0.201930] io scheduler cfq registered (default) [ 0.203510] Could not set LED4 to fully on [ 0.205725] omap_uart.0: ttyO0 at MMIO 0x44e09000 (irq = 72) is a OMAP UART0 [ 0.898655] ti81xx_interrupt 939: VBUS error workaround (delay coming) [ 0.905579] console [ttyO0] enabled [ 0.910073] omap_uart.1: ttyO1 at MMIO 0x48022000 (irq = 73) is a OMAP UART1 [ 0.918122] omap_uart.2: ttyO2 at MMIO 0x48024000 (irq = 74) is a OMAP UART2 [ 0.926156] omap_uart.3: ttyO3 at MMIO 0x481a6000 (irq = 44) is a OMAP UART3 [ 0.934103] omap_uart.4: ttyO4 at MMIO 0x481a8000 (irq = 45) is a OMAP UART4 [ 0.942116] omap_uart.5: ttyO5 at MMIO 0x481aa000 (irq = 46) is a OMAP UART5 [ 0.962983] brd: module loaded [ 0.973119] loop: module loaded [ 0.976749] i2c-core: driver [tsl2550] using legacy suspend method [ 0.983254] i2c-core: driver [tsl2550] using legacy resume method [ 0.989770] at24 1-0051: 32768 byte 24c256 EEPROM, writable, 64 bytes/write [ 1.055184] No daughter card found [ 1.058824] at24 1-0050: 32768 byte 24c256 EEPROM, writable, 64 bytes/write [ 1.066174] Overriding the EEPROM configuration for Tornado [ 1.072041] Board name: A335x [ 1.075177] Board version: 1 [ 1.078206] SKU: SKU#01 [ 1.080940] The board is general purpose EVM in profile 0 [ 1.086643] Found invalid GP EVM revision, falling back to Rev1.1A [ 1.094189] omap-gpmc omap-gpmc: GPMC revision 6.0 [ 1.099478] Registering NAND on CS0 [ 1.107024] mtdoops: mtd device (mtddev=name/number) must be supplied [ 1.114478] omap2-nand driver initializing [ 1.119245] NAND device: Manufacturer ID: 0x98, Chip ID: 0xda (Toshiba NAND 256MiB 3,3V 8-bit) [ 1.128626] Creating 8 MTD partitions on "omap2-nand.0": [ 1.134235] 0x000000000000-0x000000020000 : "SPL" [ 1.141072] 0x000000020000-0x000000040000 : "SPL.backup1" [ 1.148475] 0x000000040000-0x000000060000 : "SPL.backup2" [ 1.155919] 0x000000060000-0x000000080000 : "SPL.backup3" [ 1.163323] 0x000000080000-0x000000260000 : "U-Boot" [ 1.171068] 0x000000260000-0x000000280000 : "U-Boot Env" [ 1.178482] 0x000000280000-0x000000780000 : "Kernel" [ 1.187519] 0x000000780000-0x000010000000 : "File System" [ 1.299187] OneNAND driver initializing [ 1.304142] UBI: attaching mtd7 to ubi0 [ 1.308244] UBI: physical eraseblock size: 131072 bytes (128 KiB) [ 1.314841] UBI: logical eraseblock size: 126976 bytes [ 1.320542] UBI: smallest flash I/O unit: 2048 [ 1.325505] UBI: sub-page size: 512 [ 1.330361] UBI: VID header offset: 2048 (aligned 2048) [ 1.336702] UBI: data offset: 4096 [ 2.444697] UBI error: compare_lebs: unsupported on-flash UBI format [ 2.444713] [ 2.452993] slab error in kmem_cache_destroy(): cache `ubi_scan_leb_slab': Can't free all objects [ 2.462349] Backtrace: [ 2.464973] [<c00178f8>] (dump_backtrace+0x0/0x110) from [<c041636c>] (dump_stack+0x18/0x1c) [ 2.473878] r6:cfa78000 r5:cfaa25c0 r4:cfa0dc40 r3:c05dfcc8 [ 2.479894] [<c0416354>] (dump_stack+0x0/0x1c) from [<c00a46e4>] (kmem_cache_destroy+0xd0/0x104) [ 2.489181] [<c00a4614>] (kmem_cache_destroy+0x0/0x104) from [<c027daf4>] (ubi_scan+0x1b4/0xa24) [ 2.498445] r4:00000400 r3:cfaac000 [ 2.502230] [<c027d940>] (ubi_scan+0x0/0xa24) from [<c02759e8>] (ubi_attach_mtd_dev+0x4a8/0xa0c) [ 2.511511] [<c0275540>] (ubi_attach_mtd_dev+0x0/0xa0c) from [<c05a1610>] (ubi_init+0x204/0x2f0) [ 2.520783] [<c05a140c>] (ubi_init+0x0/0x2f0) from [<c0008704>] (do_one_initcall+0x3c/0x180) [ 2.529702] [<c00086c8>] (do_one_initcall+0x0/0x180) from [<c0581884>] (kernel_init+0x9c/0x130) [ 2.538904] [<c05817e8>] (kernel_init+0x0/0x130) from [<c003feb0>] (do_exit+0x0/0x67c) [ 2.547247] r5:c05817e8 r4:00000000 [ 2.551460] UBI error: ubi_init: cannot attach mtd7 [ 2.557738] CAN device driver interface [ 2.561784] CAN bus driver for Bosch D_CAN controller 1.0 [ 2.615096] davinci_mdio davinci_mdio.0: davinci mdio revision 1.6 [ 2.621607] davinci_mdio davinci_mdio.0: detected phy mask fffffffe [ 2.629021] davinci_mdio.0: probed [ 2.632611] davinci_mdio davinci_mdio.0: phy[0]: device 0:00, driver unknown [ 2.640520] usbcore: registered new interface driver zd1201 [ 2.646674] usbcore: registered new interface driver cdc_ether [ 2.653033] usbcore: registered new interface driver cdc_eem [ 2.659245] usbcore: registered new interface driver dm9601 [ 2.665192] cdc_ncm: 04-Aug-2011 [ 2.668818] usbcore: registered new interface driver cdc_ncm [ 2.674786] Initializing USB Mass Storage driver... [ 2.680268] usbcore: registered new interface driver usb-storage [ 2.686619] USB Mass Storage support registered. [ 2.692080] mousedev: PS/2 mouse device common for all mice [ 2.699371] omap_rtc omap_rtc: rtc core: registered omap_rtc as rtc0 [ 2.706139] omap_rtc: already running [ 2.710211] i2c /dev entries driver [ 2.714423] Linux video capture interface: v2.00 [ 2.719770] usbcore: registered new interface driver uvcvideo [ 2.725849] USB Video Class driver (1.1.1) [ 2.732453] OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec [ 2.739136] _regulator_get: deviceless supply vdd_mpu not found, using dummy regulator [ 2.748081] cpuidle: using governor ladder [ 2.753080] cpuidle: using governor menu [ 2.760193] usbcore: registered new interface driver usbhid [ 2.766105] usbhid: USB HID core driver [ 2.770924] usbcore: registered new interface driver snd-usb-audio [ 2.779502] ALSA device list: [ 2.782633] No soundcards found. [ 2.786248] oprofile: hardware counters not available [ 2.791564] oprofile: using timer interrupt. [ 2.796097] nf_conntrack version 0.5.0 (3959 buckets, 15836 max) [ 2.803021] ip_tables: (C) 2000-2006 Netfilter Core Team [ 2.808798] TCP cubic registered [ 2.812203] NET: Registered protocol family 17 [ 2.816921] can: controller area network core (rev 20090105 abi 8) [ 2.823550] NET: Registered protocol family 29 [ 2.828255] can: raw protocol (rev 20090105) [ 2.832755] can: broadcast manager protocol (rev 20090105 t) [ 2.838776] Registering the dns_resolver key type [ 2.843823] VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3 [ 2.851923] ThumbEE CPU extension supported. [ 2.856500] mux: Failed to setup hwmod io irq -22 [ 2.862215] Power Management for AM33XX family [ 2.867147] Trying to load am335x-pm-firmware.bin (60 secs timeout) [ 2.873859] Copied the M3 firmware to UMEM [ 2.878222] omap_hwmod: wkup_m3: wkup_m3: hwmod data error: OMAP4 does not support st_shift [ 2.891353] clock: disabling unused clocks to save power [ 2.899371] Detected MACID=0:18:31:8e:26:fe [ 2.905666] omap_rtc omap_rtc: setting system clock to 2000-01-01 00:00:00 UTC (946684800) [ 2.917480] [ 2.917489] CPSW phy found : id is : 0x221611 [ 2.924372] PHY 0:01 not found [ 11.915911] PHY: 0:00 - Link is Up - 1000/Full [ 11.945067] Sending DHCP requests . [ 13.915886] PHY: 0:00 - Link is Down [ 14.525044] . [ 17.915919] PHY: 0:00 - Link is Up - 1000/Full [ 19.035043] ., OK [ 19.645529] IP-Config: Got DHCP answer from 0.0.0.0, my address is 141.183.190.183 [ 19.654162] IP-Config: Complete: [ 19.657607] device=eth0, addr=141.183.190.183, mask=255.255.252.0, gw=141.183.188.1, [ 19.665987] host=141.183.190.183, domain=mys.agilent.com, nis-domain=(none), [ 19.673869] bootserver=0.0.0.0, rootserver=0.0.0.0, rootpath= [ 19.681129] VFS: Cannot open root device "ubi0:rootfs" or unknown-block(0,0) [ 19.688596] Please append a correct "root=" boot option; here are the available partitions: [ 19.697452] 1f00 128 mtdblock0 (driver?) [ 19.702780] 1f01 128 mtdblock1 (driver?) [ 19.708126] 1f02 128 mtdblock2 (driver?) [ 19.713452] 1f03 128 mtdblock3 (driver?) [ 19.718795] 1f04 1920 mtdblock4 (driver?) [ 19.724123] 1f05 128 mtdblock5 (driver?) [ 19.729467] 1f06 5120 mtdblock6 (driver?) [ 19.734793] 1f07 254464 mtdblock7 (driver?) [ 19.740131] Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0) [ 19.748840] Backtrace: [ 19.751464] [<c00178f8>] (dump_backtrace+0x0/0x110) from [<c041636c>] (dump_stack+0x18/0x1c) [ 19.760366] r6:cf840000 r5:c05addc4 r4:c061c7c8 r3:c05dfcc8 [ 19.766374] [<c0416354>] (dump_stack+0x0/0x1c) from [<c04163dc>] (panic+0x6c/0x1a0) [ 19.774455] [<c0416370>] (panic+0x0/0x1a0) from [<c0581cb4>] (mount_block_root+0x184/0x228) [ 19.783265] r3:c05dfcc8 r2:00000000 r1:cf81df78 r0:c04e8500 [ 19.789257] r7:00008000 [ 19.791941] [<c0581b30>] (mount_block_root+0x0/0x228) from [<c0581fd0>] (prepare_namespace+0xac/0x1d4) [ 19.801770] [<c0581f24>] (prepare_namespace+0x0/0x1d4) from [<c058190c>] (kernel_init+0x124/0x130) [ 19.811219] r5:c05bbf94 r4:c05bbf94 [ 19.815009] [<c05817e8>] (kernel_init+0x0/0x130) from [<c003feb0>] (do_exit+0x0/0x67c) [ 19.823358] r5:c05817e8 r4:00000000
Hi Keldy,
I got some pointers from experts,
Have you followed this wiki page especially "Creating_UBIFS_file_system and calculations" sections? If you are not following exact steps then we might hit this problem.
http://processors.wiki.ti.com/index.php/UBIFS_Support
Regards
AnilKumar
Please mark this Forum post as answered via the Verify Answer button below if it helps answer your question. Thanks!
Hi,
i use command:
mkfs.ubifs -r targetNFS/ -o ubifs.img -m 2048 -e 126976 -c 1580
i throw away the -F option, because the mtd-utils new version (1.5), dont have the -F option.
ubinize -o ubi.img -m 2048 -p 128KiB -s 512 -O 2048 ubinize.cfg
with ubinize.cfg:
[ubifs]
mode=ubi
image=ubifs.img
vol_id=0
vol_size=192MiB
vol_type=dynamic
vol_name=rootfs
vol_flags=autoresize
i follow the exact the same as the tutorial from link http://processors.wiki.ti.com/index.php/UBIFS_Support
because i dont know how to get the all the calculation parameter from nand flash datasheet, i using nand flash MT29F2G08ABAEAWP:E. Will the nand flash datasheet provide all the parameter that i need? like PEB, LEB, P, B, O ?
Thanks and Regards
Keldy
Hi,
for your information, i boot my device over network to get into linux. in linux, i flash my file system image using command "ubiformat /dev/mtd7 -f ubi.img -s 512 -O 2048". it was sucessfully write and can boot from nand flash sucessfully.
I need to use u-boot to write my file system. using the same file system image, but flashing to nand flash in u-boot, it will failed.
my new image calculation is as below:
2Gb nand flash or 256MiB
SP PEB size 128KiB
SL LEB size 128KiB - 2 * 2KiB = 124KiB
P Total number of PEBs on the MTD device 256MiB / 128KiB = 2048
B Number of PEBs reserved for bad PEB handling 1% of P = 20.48 (round to 21)
O The overhead related to storing EC and VID headers in bytes SP-SL = 4KiB
UBI Overhead = (B + 4) * SP + O * (P - B - 4)
=(21 + 4) * 128KiB + 4KiB (2048 - 21 - 4)
=11292KiB or 88 PEB
(P - Ubi overhead) * 128KiB / SL = (2048 - 88 ) *128KiB/ 124KiB = 2023
volume size = (P - Ubi overhead) * 128KiB = 245MiB
command for creating img:
*note mtd-utils 1.5 version dont have -F option
mkfs.ubifs -r filesystem/ -o ubifs.img -m 2048 -e 126976 -c 2023
ubinize -o ubi.img -m 2048 -p 128KiB -s 512 -O 2048 ubinize.cfg
ubinize.cfg:
[ubifs]
mode=ubi
image=ubifs.img
vol_id=0
vol_size=245MiB
vol_type=dynamic
vol_name=rootfs
vol_flags=autoresize
Are my calculation and command correct for creating a valib file system image?
Thanks and Regards
Keldy
Hi,
In u-boot, i use command "nandecc hw 2" to select ECC, which is BCH8.
once i burn my image in linux using command:
flash_eraseall /dev/mtd7
ubiformat /dev/mtd7 -f ubi.img -s 512 -O 2048
ubiattach /dev/ubi_ctrl -m 7 -O 2048
my UBIFS can work properly and working consistently even after several reboots or reset.
only burning image in u-boot have problem. What is the difference between flashing image in u-boot and linux ?
Thanks & Regards
Keldy
1. Are you sure that you are selecting BCH8 in kernel?
2. There are pages in ubi.img where the data is 0xFF which is assumed to be erased by UBIFS. When you flash the image from u-boot it considers the whole page as a valid data page with content 0xFF and calculates ECC and writes it to the spare area. So, what happens here is when the kernel is up, UBI treats this page as erased and proceed to write data there without erase. Now the ECC area will get overwritten with the new value. So the next you reboot/read back there will be ECC mismatch.
3. The third issue is similar, but it is related to sub-page. I'm not sure whether your kernel has issues related to sub-page.
Keldy,
Can you send me the list of files given below to my e-mail renjith.thomas@pathpartnertech.com?
arch/arm/mach-omap2/board-am335xevm.c
arch/arm/mach-omap2/board-flash.c
arch/arm/mach-omap2/gpmc.c
drivers/mtd/nand/nand_base.c
drivers/mtd/nand/omap2.c
hi
here the file,
/*
* board-flash.c
* Modified from mach-omap2/board-3430sdp-flash.c
*
* Copyright (C) 2009 Nokia Corporation
* Copyright (C) 2009 Texas Instruments
*
* Vimal Singh <vimalsingh@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/io.h>
#include <plat/irqs.h>
#include <plat/gpmc.h>
#include <plat/nand.h>
#include <plat/onenand.h>
#include <plat/tc.h>
#include "board-flash.h"
#define REG_FPGA_REV 0x10
#define REG_FPGA_DIP_SWITCH_INPUT2 0x60
#define MAX_SUPPORTED_GPMC_CONFIG 3
#define DEBUG_BASE 0x08000000 /* debug board */
/* various memory sizes */
#define FLASH_SIZE_SDPV1 SZ_64M /* NOR flash (64 Meg aligned) */
#define FLASH_SIZE_SDPV2 SZ_128M /* NOR flash (256 Meg aligned) */
static struct physmap_flash_data board_nor_data = {
.width = 2,
};
static struct resource board_nor_resource = {
.flags = IORESOURCE_MEM,
};
static struct platform_device board_nor_device = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = &board_nor_data,
},
.num_resources = 1,
.resource = &board_nor_resource,
};
static void
__init board_nor_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
{
int err;
board_nor_data.parts = nor_parts;
board_nor_data.nr_parts = nr_parts;
/* Configure start address and size of NOR device */
if (omap_rev() >= OMAP3430_REV_ES1_0) {
err = gpmc_cs_request(cs, FLASH_SIZE_SDPV2 - 1,
(unsigned long *)&board_nor_resource.start);
board_nor_resource.end = board_nor_resource.start
+ FLASH_SIZE_SDPV2 - 1;
} else {
err = gpmc_cs_request(cs, FLASH_SIZE_SDPV1 - 1,
(unsigned long *)&board_nor_resource.start);
board_nor_resource.end = board_nor_resource.start
+ FLASH_SIZE_SDPV1 - 1;
}
if (err < 0) {
pr_err("NOR: Can't request GPMC CS\n");
return;
}
if (platform_device_register(&board_nor_device) < 0)
pr_err("Unable to register NOR device\n");
}
#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
static struct omap_onenand_platform_data board_onenand_data = {
.dma_channel = -1, /* disable DMA in OMAP OneNAND driver */
};
static void
__init board_onenand_init(struct mtd_partition *onenand_parts,
u8 nr_parts, u8 cs)
{
board_onenand_data.cs = cs;
board_onenand_data.parts = onenand_parts;
board_onenand_data.nr_parts = nr_parts;
gpmc_onenand_init(&board_onenand_data);
}
#else
static void
__init board_onenand_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
{
}
#endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */
#if defined(CONFIG_MTD_NAND_OMAP2) || \
defined(CONFIG_MTD_NAND_OMAP2_MODULE)
/* Note that all values in this struct are in nanoseconds */
static struct gpmc_timings nand_timings = {
.sync_clk = 0,
.cs_on = 0,
.cs_rd_off = 36,
.cs_wr_off = 36,
.adv_on = 6,
.adv_rd_off = 24,
.adv_wr_off = 36,
.we_off = 30,
.oe_off = 48,
.access = 54,
.rd_cycle = 72,
.wr_cycle = 72,
.wr_access = 30,
.wr_data_mux_bus = 0,
};
static struct omap_nand_platform_data board_nand_data = {
.gpmc_t = &nand_timings,
};
void
__init board_nand_init(struct mtd_partition *nand_parts,
u8 nr_parts, u8 cs, int nand_type)
{
board_nand_data.cs = cs;
board_nand_data.parts = nand_parts;
board_nand_data.nr_parts = nr_parts;
board_nand_data.devsize = nand_type;
board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DEFAULT;
board_nand_data.gpmc_irq = OMAP_GPMC_IRQ_BASE + cs;
if (cpu_is_am335x()) {
board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_HW;
board_nand_data.xfer_type = NAND_OMAP_PREFETCH_POLLED;
}
gpmc_nand_init(&board_nand_data);
}
#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
/**
* get_gpmc0_type - Reads the FPGA DIP_SWITCH_INPUT_REGISTER2 to get
* the various cs values.
*/
static u8 get_gpmc0_type(void)
{
u8 cs = 0;
void __iomem *fpga_map_addr;
fpga_map_addr = ioremap(DEBUG_BASE, 4096);
if (!fpga_map_addr)
return -ENOMEM;
if (!(__raw_readw(fpga_map_addr + REG_FPGA_REV)))
/* we dont have an DEBUG FPGA??? */
/* Depend on #defines!! default to strata boot return param */
goto unmap;
/* S8-DIP-OFF = 1, S8-DIP-ON = 0 */
cs = __raw_readw(fpga_map_addr + REG_FPGA_DIP_SWITCH_INPUT2) & 0xf;
/* ES2.0 SDP's onwards 4 dip switches are provided for CS */
if (omap_rev() >= OMAP3430_REV_ES1_0)
/* change (S8-1:4=DS-2:0) to (S8-4:1=DS-2:0) */
cs = ((cs & 8) >> 3) | ((cs & 4) >> 1) |
((cs & 2) << 1) | ((cs & 1) << 3);
else
/* change (S8-1:3=DS-2:0) to (S8-3:1=DS-2:0) */
cs = ((cs & 4) >> 2) | (cs & 2) | ((cs & 1) << 2);
unmap:
iounmap(fpga_map_addr);
return cs;
}
/**
* board_flash_init - Identify devices connected to GPMC and register.
*
* @return - void.
*/
void board_flash_init(struct flash_partitions partition_info[],
char chip_sel_board[][GPMC_CS_NUM], int nand_type)
{
u8 cs = 0;
u8 norcs = GPMC_CS_NUM + 1;
u8 nandcs = GPMC_CS_NUM + 1;
u8 onenandcs = GPMC_CS_NUM + 1;
u8 idx;
unsigned char *config_sel = NULL;
/* REVISIT: Is this return correct idx for 2430 SDP?
* for which cs configuration matches for 2430 SDP?
*/
idx = get_gpmc0_type();
if (idx >= MAX_SUPPORTED_GPMC_CONFIG) {
pr_err("%s: Invalid chip select: %d\n", __func__, cs);
return;
}
config_sel = (unsigned char *)(chip_sel_board[idx]);
while (cs < GPMC_CS_NUM) {
switch (config_sel[cs]) {
case PDC_NOR:
if (norcs > GPMC_CS_NUM)
norcs = cs;
break;
case PDC_NAND:
if (nandcs > GPMC_CS_NUM)
nandcs = cs;
break;
case PDC_ONENAND:
if (onenandcs > GPMC_CS_NUM)
onenandcs = cs;
break;
};
cs++;
}
if (norcs > GPMC_CS_NUM)
pr_err("NOR: Unable to find configuration in GPMC\n");
else
board_nor_init(partition_info[0].parts,
partition_info[0].nr_parts, norcs);
if (onenandcs > GPMC_CS_NUM)
pr_err("OneNAND: Unable to find configuration in GPMC\n");
else
board_onenand_init(partition_info[1].parts,
partition_info[1].nr_parts, onenandcs);
if (nandcs > GPMC_CS_NUM)
pr_err("NAND: Unable to find configuration in GPMC\n");
else
board_nand_init(partition_info[2].parts,
partition_info[2].nr_parts, nandcs, nand_type);
}
/*
* GPMC support functions
*
* Copyright (C) 2005-2006 Nokia Corporation
*
* Author: Juha Yrjola
*
* Copyright (C) 2009 Texas Instruments
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#undef DEBUG
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/ioport.h>
#include <linux/spinlock.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <asm/mach-types.h>
#include <plat/gpmc.h>
#include <plat/sdrc.h>
/* GPMC register offsets */
#define GPMC_REVISION 0x00
#define GPMC_SYSCONFIG 0x10
#define GPMC_SYSSTATUS 0x14
#define GPMC_IRQSTATUS 0x18
#define GPMC_IRQENABLE 0x1c
#define GPMC_TIMEOUT_CONTROL 0x40
#define GPMC_ERR_ADDRESS 0x44
#define GPMC_ERR_TYPE 0x48
#define GPMC_CONFIG 0x50
#define GPMC_STATUS 0x54
#define GPMC_PREFETCH_CONFIG1 0x1e0
#define GPMC_PREFETCH_CONFIG2 0x1e4
#define GPMC_PREFETCH_CONTROL 0x1ec
#define GPMC_PREFETCH_STATUS 0x1f0
#define GPMC_ECC_CONFIG 0x1f4
#define GPMC_ECC_CONTROL 0x1f8
#define GPMC_ECC_SIZE_CONFIG 0x1fc
#define GPMC_ECC1_RESULT 0x200
#define GPMC_CS0_OFFSET 0x60
#define GPMC_CS_SIZE 0x30
#define GPMC_MEM_START 0x00000000
#define GPMC_MEM_END 0x3FFFFFFF
#define BOOT_ROM_SPACE 0x100000 /* 1MB */
#define GPMC_CHUNK_SHIFT 24 /* 16 MB */
#define GPMC_SECTION_SHIFT 28 /* 128 MB */
#define CS_NUM_SHIFT 24
#define ENABLE_PREFETCH (0x1 << 7)
#define DMA_MPU_MODE 2
/* Structure to save gpmc cs context */
struct gpmc_cs_config {
u32 config1;
u32 config2;
u32 config3;
u32 config4;
u32 config5;
u32 config6;
u32 config7;
int is_valid;
};
/*
* Structure to save/restore gpmc context
* to support core off on OMAP3
*/
struct omap3_gpmc_regs {
u32 sysconfig;
u32 irqenable;
u32 timeout_ctrl;
u32 config;
u32 prefetch_config1;
u32 prefetch_config2;
u32 prefetch_control;
struct gpmc_cs_config cs_context[GPMC_CS_NUM];
};
static struct resource gpmc_mem_root;
static struct resource gpmc_cs_mem[GPMC_CS_NUM];
static DEFINE_SPINLOCK(gpmc_mem_lock);
static unsigned int gpmc_cs_map; /* flag for cs which are initialized */
static int gpmc_ecc_used = -EINVAL; /* cs using ecc engine */
static void __iomem *gpmc_base;
static struct clk *gpmc_l3_clk;
static irqreturn_t gpmc_handle_irq(int irq, void *dev);
static void gpmc_write_reg(int idx, u32 val)
{
__raw_writel(val, gpmc_base + idx);
}
static u32 gpmc_read_reg(int idx)
{
return __raw_readl(gpmc_base + idx);
}
static void gpmc_cs_write_byte(int cs, int idx, u8 val)
{
void __iomem *reg_addr;
reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx;
__raw_writeb(val, reg_addr);
}
static u8 gpmc_cs_read_byte(int cs, int idx)
{
void __iomem *reg_addr;
reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx;
return __raw_readb(reg_addr);
}
void gpmc_cs_write_reg(int cs, int idx, u32 val)
{
void __iomem *reg_addr;
reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx;
__raw_writel(val, reg_addr);
}
u32 gpmc_cs_read_reg(int cs, int idx)
{
void __iomem *reg_addr;
reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx;
return __raw_readl(reg_addr);
}
/* TODO: Add support for gpmc_fck to clock framework and use it */
unsigned long gpmc_get_fclk_period(void)
{
unsigned long rate = clk_get_rate(gpmc_l3_clk);
if (rate == 0) {
printk(KERN_WARNING "gpmc_l3_clk not enabled\n");
return 0;
}
rate /= 1000;
rate = 1000000000 / rate; /* In picoseconds */
return rate;
}
unsigned int gpmc_ns_to_ticks(unsigned int time_ns)
{
unsigned long tick_ps;
/* Calculate in picosecs to yield more exact results */
tick_ps = gpmc_get_fclk_period();
return (time_ns * 1000 + tick_ps - 1) / tick_ps;
}
unsigned int gpmc_ps_to_ticks(unsigned int time_ps)
{
unsigned long tick_ps;
/* Calculate in picosecs to yield more exact results */
tick_ps = gpmc_get_fclk_period();
return (time_ps + tick_ps - 1) / tick_ps;
}
unsigned int gpmc_ticks_to_ns(unsigned int ticks)
{
return ticks * gpmc_get_fclk_period() / 1000;
}
unsigned int gpmc_round_ns_to_ticks(unsigned int time_ns)
{
unsigned long ticks = gpmc_ns_to_ticks(time_ns);
return ticks * gpmc_get_fclk_period() / 1000;
}
#ifdef DEBUG
static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
int time, const char *name)
#else
static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
int time)
#endif
{
u32 l;
int ticks, mask, nr_bits;
if (time == 0)
ticks = 0;
else
ticks = gpmc_ns_to_ticks(time);
nr_bits = end_bit - st_bit + 1;
if (ticks >= 1 << nr_bits) {
#ifdef DEBUG
printk(KERN_INFO "GPMC CS%d: %-10s* %3d ns, %3d ticks >= %d\n",
cs, name, time, ticks, 1 << nr_bits);
#endif
return -1;
}
mask = (1 << nr_bits) - 1;
l = gpmc_cs_read_reg(cs, reg);
#ifdef DEBUG
printk(KERN_INFO
"GPMC CS%d: %-10s: %3d ticks, %3lu ns (was %3i ticks) %3d ns\n",
cs, name, ticks, gpmc_get_fclk_period() * ticks / 1000,
(l >> st_bit) & mask, time);
#endif
l &= ~(mask << st_bit);
l |= ticks << st_bit;
gpmc_cs_write_reg(cs, reg, l);
return 0;
}
#ifdef DEBUG
#define GPMC_SET_ONE(reg, st, end, field) \
if (set_gpmc_timing_reg(cs, (reg), (st), (end), \
t->field, #field) < 0) \
return -1
#else
#define GPMC_SET_ONE(reg, st, end, field) \
if (set_gpmc_timing_reg(cs, (reg), (st), (end), t->field) < 0) \
return -1
#endif
int gpmc_cs_calc_divider(int cs, unsigned int sync_clk)
{
int div;
u32 l;
l = sync_clk + (gpmc_get_fclk_period() - 1);
div = l / gpmc_get_fclk_period();
if (div > 4)
return -1;
if (div <= 0)
div = 1;
return div;
}
int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t)
{
int div;
u32 l;
div = gpmc_cs_calc_divider(cs, t->sync_clk);
if (div < 0)
return -1;
GPMC_SET_ONE(GPMC_CS_CONFIG2, 0, 3, cs_on);
GPMC_SET_ONE(GPMC_CS_CONFIG2, 8, 12, cs_rd_off);
GPMC_SET_ONE(GPMC_CS_CONFIG2, 16, 20, cs_wr_off);
GPMC_SET_ONE(GPMC_CS_CONFIG3, 0, 3, adv_on);
GPMC_SET_ONE(GPMC_CS_CONFIG3, 8, 12, adv_rd_off);
GPMC_SET_ONE(GPMC_CS_CONFIG3, 16, 20, adv_wr_off);
GPMC_SET_ONE(GPMC_CS_CONFIG4, 0, 3, oe_on);
GPMC_SET_ONE(GPMC_CS_CONFIG4, 8, 12, oe_off);
GPMC_SET_ONE(GPMC_CS_CONFIG4, 16, 19, we_on);
GPMC_SET_ONE(GPMC_CS_CONFIG4, 24, 28, we_off);
GPMC_SET_ONE(GPMC_CS_CONFIG5, 0, 4, rd_cycle);
GPMC_SET_ONE(GPMC_CS_CONFIG5, 8, 12, wr_cycle);
GPMC_SET_ONE(GPMC_CS_CONFIG5, 16, 20, access);
GPMC_SET_ONE(GPMC_CS_CONFIG5, 24, 27, page_burst_access);
if (cpu_is_omap34xx()) {
GPMC_SET_ONE(GPMC_CS_CONFIG6, 16, 19, wr_data_mux_bus);
GPMC_SET_ONE(GPMC_CS_CONFIG6, 24, 28, wr_access);
}
/* caller is expected to have initialized CONFIG1 to cover
* at least sync vs async
*/
l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
if (l & (GPMC_CONFIG1_READTYPE_SYNC | GPMC_CONFIG1_WRITETYPE_SYNC)) {
#ifdef DEBUG
printk(KERN_INFO "GPMC CS%d CLK period is %lu ns (div %d)\n",
cs, (div * gpmc_get_fclk_period()) / 1000, div);
#endif
l &= ~0x03;
l |= (div - 1);
gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, l);
}
return 0;
}
static void gpmc_cs_enable_mem(int cs, u32 base, u32 size)
{
u32 l;
u32 mask;
mask = (1 << GPMC_SECTION_SHIFT) - size;
l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
l &= ~0x3f;
l = (base >> GPMC_CHUNK_SHIFT) & 0x3f;
l &= ~(0x0f << 8);
l |= ((mask >> GPMC_CHUNK_SHIFT) & 0x0f) << 8;
l |= GPMC_CONFIG7_CSVALID;
gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l);
}
static void gpmc_cs_disable_mem(int cs)
{
u32 l;
l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
l &= ~GPMC_CONFIG7_CSVALID;
gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l);
}
static void gpmc_cs_get_memconf(int cs, u32 *base, u32 *size)
{
u32 l;
u32 mask;
l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
*base = (l & 0x3f) << GPMC_CHUNK_SHIFT;
mask = (l >> 8) & 0x0f;
*size = (1 << GPMC_SECTION_SHIFT) - (mask << GPMC_CHUNK_SHIFT);
}
static int gpmc_cs_mem_enabled(int cs)
{
u32 l;
l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
return l & GPMC_CONFIG7_CSVALID;
}
int gpmc_cs_set_reserved(int cs, int reserved)
{
if (cs > GPMC_CS_NUM)
return -ENODEV;
gpmc_cs_map &= ~(1 << cs);
gpmc_cs_map |= (reserved ? 1 : 0) << cs;
return 0;
}
int gpmc_cs_reserved(int cs)
{
if (cs > GPMC_CS_NUM)
return -ENODEV;
return gpmc_cs_map & (1 << cs);
}
static unsigned long gpmc_mem_align(unsigned long size)
{
int order;
size = (size - 1) >> (GPMC_CHUNK_SHIFT - 1);
order = GPMC_CHUNK_SHIFT - 1;
do {
size >>= 1;
order++;
} while (size);
size = 1 << order;
return size;
}
static int gpmc_cs_insert_mem(int cs, unsigned long base, unsigned long size)
{
struct resource *res = &gpmc_cs_mem[cs];
int r;
size = gpmc_mem_align(size);
spin_lock(&gpmc_mem_lock);
res->start = base;
res->end = base + size - 1;
r = request_resource(&gpmc_mem_root, res);
spin_unlock(&gpmc_mem_lock);
return r;
}
int gpmc_cs_request(int cs, unsigned long size, unsigned long *base)
{
struct resource *res = &gpmc_cs_mem[cs];
int r = -1;
if (cs > GPMC_CS_NUM)
return -ENODEV;
size = gpmc_mem_align(size);
if (size > (1 << GPMC_SECTION_SHIFT))
return -ENOMEM;
spin_lock(&gpmc_mem_lock);
if (gpmc_cs_reserved(cs)) {
r = -EBUSY;
goto out;
}
if (gpmc_cs_mem_enabled(cs))
r = adjust_resource(res, res->start & ~(size - 1), size);
if (r < 0)
r = allocate_resource(&gpmc_mem_root, res, size, 0, ~0,
size, NULL, NULL);
if (r < 0)
goto out;
gpmc_cs_enable_mem(cs, res->start, resource_size(res));
*base = res->start;
gpmc_cs_set_reserved(cs, 1);
out:
spin_unlock(&gpmc_mem_lock);
return r;
}
EXPORT_SYMBOL(gpmc_cs_request);
void gpmc_cs_free(int cs)
{
spin_lock(&gpmc_mem_lock);
if (cs >= GPMC_CS_NUM || cs < 0 || !gpmc_cs_reserved(cs)) {
printk(KERN_ERR "Trying to free non-reserved GPMC CS%d\n", cs);
BUG();
spin_unlock(&gpmc_mem_lock);
return;
}
gpmc_cs_disable_mem(cs);
release_resource(&gpmc_cs_mem[cs]);
gpmc_cs_set_reserved(cs, 0);
spin_unlock(&gpmc_mem_lock);
}
EXPORT_SYMBOL(gpmc_cs_free);
/**
* gpmc_read_status - read access request to get the different gpmc status
* @cmd: command type
* @return status
*/
int gpmc_read_status(int cmd)
{
int status = -EINVAL;
u32 regval = 0;
switch (cmd) {
case GPMC_GET_IRQ_STATUS:
status = gpmc_read_reg(GPMC_IRQSTATUS);
break;
case GPMC_PREFETCH_FIFO_CNT:
regval = gpmc_read_reg(GPMC_PREFETCH_STATUS);
status = GPMC_PREFETCH_STATUS_FIFO_CNT(regval);
break;
case GPMC_PREFETCH_COUNT:
regval = gpmc_read_reg(GPMC_PREFETCH_STATUS);
status = GPMC_PREFETCH_STATUS_COUNT(regval);
break;
case GPMC_STATUS_BUFFER:
regval = gpmc_read_reg(GPMC_STATUS);
/* 1 : buffer is available to write */
status = regval & GPMC_STATUS_BUFF_EMPTY;
break;
default:
printk(KERN_ERR "gpmc_read_status: Not supported\n");
}
return status;
}
EXPORT_SYMBOL(gpmc_read_status);
/**
* gpmc_cs_configure - write request to configure gpmc
* @cs: chip select number
* @cmd: command type
* @wval: value to write
* @return status of the operation
*/
int gpmc_cs_configure(int cs, int cmd, int wval)
{
int err = 0;
u32 regval = 0;
switch (cmd) {
case GPMC_ENABLE_IRQ:
gpmc_write_reg(GPMC_IRQENABLE, wval);
break;
case GPMC_SET_IRQ_STATUS:
gpmc_write_reg(GPMC_IRQSTATUS, wval);
break;
case GPMC_CONFIG_WP:
regval = gpmc_read_reg(GPMC_CONFIG);
if (wval)
regval &= ~GPMC_CONFIG_WRITEPROTECT; /* WP is ON */
else
regval |= GPMC_CONFIG_WRITEPROTECT; /* WP is OFF */
gpmc_write_reg(GPMC_CONFIG, regval);
break;
case GPMC_CONFIG_RDY_BSY:
regval = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
if (wval)
regval |= WR_RD_PIN_MONITORING;
else
regval &= ~WR_RD_PIN_MONITORING;
gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, regval);
break;
case GPMC_CONFIG_DEV_SIZE:
regval = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
regval |= GPMC_CONFIG1_DEVICESIZE(wval);
gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, regval);
break;
case GPMC_CONFIG_DEV_TYPE:
regval = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
regval |= GPMC_CONFIG1_DEVICETYPE(wval);
if (wval == GPMC_DEVICETYPE_NOR)
regval |= GPMC_CONFIG1_MUXADDDATA;
gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, regval);
break;
default:
printk(KERN_ERR "gpmc_configure_cs: Not supported\n");
err = -EINVAL;
}
return err;
}
EXPORT_SYMBOL(gpmc_cs_configure);
/**
* gpmc_nand_read - nand specific read access request
* @cs: chip select number
* @cmd: command type
*/
int gpmc_nand_read(int cs, int cmd)
{
int rval = -EINVAL;
switch (cmd) {
case GPMC_NAND_DATA:
rval = gpmc_cs_read_byte(cs, GPMC_CS_NAND_DATA);
break;
default:
printk(KERN_ERR "gpmc_read_nand_ctrl: Not supported\n");
}
return rval;
}
EXPORT_SYMBOL(gpmc_nand_read);
/**
* gpmc_nand_write - nand specific write request
* @cs: chip select number
* @cmd: command type
* @wval: value to write
*/
int gpmc_nand_write(int cs, int cmd, int wval)
{
int err = 0;
switch (cmd) {
case GPMC_NAND_COMMAND:
gpmc_cs_write_byte(cs, GPMC_CS_NAND_COMMAND, wval);
break;
case GPMC_NAND_ADDRESS:
gpmc_cs_write_byte(cs, GPMC_CS_NAND_ADDRESS, wval);
break;
case GPMC_NAND_DATA:
gpmc_cs_write_byte(cs, GPMC_CS_NAND_DATA, wval);
default:
printk(KERN_ERR "gpmc_write_nand_ctrl: Not supported\n");
err = -EINVAL;
}
return err;
}
EXPORT_SYMBOL(gpmc_nand_write);
/**
* gpmc_prefetch_enable - configures and starts prefetch transfer
* @cs: cs (chip select) number
* @fifo_th: fifo threshold to be used for read/ write
* @dma_mode: dma mode enable (1) or disable (0)
* @u32_count: number of bytes to be transferred
* @is_write: prefetch read(0) or write post(1) mode
*/
int gpmc_prefetch_enable(int cs, int fifo_th, int dma_mode,
unsigned int u32_count, int is_write)
{
if (fifo_th > PREFETCH_FIFOTHRESHOLD_MAX) {
pr_err("gpmc: fifo threshold is not supported\n");
return -1;
} else if (!(gpmc_read_reg(GPMC_PREFETCH_CONTROL))) {
/* Set the amount of bytes to be prefetched */
gpmc_write_reg(GPMC_PREFETCH_CONFIG2, u32_count);
/* Set dma/mpu mode, the prefetch read / post write and
* enable the engine. Set which cs is has requested for.
*/
gpmc_write_reg(GPMC_PREFETCH_CONFIG1, ((cs << CS_NUM_SHIFT) |
PREFETCH_FIFOTHRESHOLD(fifo_th) |
ENABLE_PREFETCH |
(dma_mode << DMA_MPU_MODE) |
(0x1 & is_write)));
/* Start the prefetch engine */
gpmc_write_reg(GPMC_PREFETCH_CONTROL, 0x1);
} else {
return -EBUSY;
}
return 0;
}
EXPORT_SYMBOL(gpmc_prefetch_enable);
/**
* gpmc_prefetch_reset - disables and stops the prefetch engine
*/
int gpmc_prefetch_reset(int cs)
{
u32 config1;
/* check if the same module/cs is trying to reset */
config1 = gpmc_read_reg(GPMC_PREFETCH_CONFIG1);
if (((config1 >> CS_NUM_SHIFT) & 0x7) != cs)
return -EINVAL;
/* Stop the PFPW engine */
gpmc_write_reg(GPMC_PREFETCH_CONTROL, 0x0);
/* Reset/disable the PFPW engine */
gpmc_write_reg(GPMC_PREFETCH_CONFIG1, 0x0);
return 0;
}
EXPORT_SYMBOL(gpmc_prefetch_reset);
static void __init gpmc_mem_init(void)
{
int cs;
unsigned long boot_rom_space = 0;
/* never allocate the first page, to facilitate bug detection;
* even if we didn't boot from ROM.
*/
boot_rom_space = BOOT_ROM_SPACE;
/* In apollon the CS0 is mapped as 0x0000 0000 */
if (machine_is_omap_apollon())
boot_rom_space = 0;
gpmc_mem_root.start = GPMC_MEM_START + boot_rom_space;
gpmc_mem_root.end = GPMC_MEM_END;
/* Reserve all regions that has been set up by bootloader */
for (cs = 0; cs < GPMC_CS_NUM; cs++) {
u32 base, size;
if (!gpmc_cs_mem_enabled(cs))
continue;
gpmc_cs_get_memconf(cs, &base, &size);
if (gpmc_cs_insert_mem(cs, base, size) < 0)
BUG();
}
}
static int __init gpmc_init(void)
{
u32 l, irq;
int cs, ret = -EINVAL;
int gpmc_irq;
char *ck = NULL;
if (cpu_is_omap24xx()) {
ck = "core_l3_ck";
if (cpu_is_omap2420())
l = OMAP2420_GPMC_BASE;
else
l = OMAP34XX_GPMC_BASE;
gpmc_irq = INT_34XX_GPMC_IRQ;
} else if (cpu_is_omap34xx()) {
ck = "gpmc_fck";
if (cpu_is_am33xx())
l = OMAP44XX_GPMC_BASE;
else
l = OMAP34XX_GPMC_BASE;
gpmc_irq = INT_34XX_GPMC_IRQ;
} else if (cpu_is_omap44xx()) {
ck = "gpmc_ck";
l = OMAP44XX_GPMC_BASE;
gpmc_irq = OMAP44XX_IRQ_GPMC;
}
if (WARN_ON(!ck))
return ret;
gpmc_l3_clk = clk_get(NULL, ck);
if (IS_ERR(gpmc_l3_clk)) {
printk(KERN_ERR "Could not get GPMC clock %s\n", ck);
BUG();
}
gpmc_base = ioremap(l, SZ_4K);
if (!gpmc_base) {
clk_put(gpmc_l3_clk);
printk(KERN_ERR "Could not get GPMC register memory\n");
BUG();
}
clk_enable(gpmc_l3_clk);
l = gpmc_read_reg(GPMC_REVISION);
printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f);
/* Set smart idle mode and automatic L3 clock gating */
l = gpmc_read_reg(GPMC_SYSCONFIG);
l &= 0x03 << 3;
l |= (0x02 << 3) | (1 << 0);
gpmc_write_reg(GPMC_SYSCONFIG, l);
gpmc_mem_init();
/* initalize the irq_chained */
irq = OMAP_GPMC_IRQ_BASE;
for (cs = 0; cs < GPMC_CS_NUM; cs++) {
irq_set_chip_and_handler(irq, &dummy_irq_chip,
handle_simple_irq);
set_irq_flags(irq, IRQF_VALID);
irq++;
}
ret = request_irq(gpmc_irq,
gpmc_handle_irq, IRQF_SHARED, "gpmc", gpmc_base);
if (ret)
pr_err("gpmc: irq-%d could not claim: err %d\n",
gpmc_irq, ret);
return ret;
}
postcore_initcall(gpmc_init);
static irqreturn_t gpmc_handle_irq(int irq, void *dev)
{
u8 cs;
/* check cs to invoke the irq */
cs = ((gpmc_read_reg(GPMC_PREFETCH_CONFIG1)) >> CS_NUM_SHIFT) & 0x7;
if (OMAP_GPMC_IRQ_BASE+cs <= OMAP_GPMC_IRQ_END)
generic_handle_irq(OMAP_GPMC_IRQ_BASE+cs);
return IRQ_HANDLED;
}
#ifdef CONFIG_ARCH_OMAP3
static struct omap3_gpmc_regs gpmc_context;
void omap3_gpmc_save_context(void)
{
int i;
gpmc_context.sysconfig = gpmc_read_reg(GPMC_SYSCONFIG);
gpmc_context.irqenable = gpmc_read_reg(GPMC_IRQENABLE);
gpmc_context.timeout_ctrl = gpmc_read_reg(GPMC_TIMEOUT_CONTROL);
gpmc_context.config = gpmc_read_reg(GPMC_CONFIG);
gpmc_context.prefetch_config1 = gpmc_read_reg(GPMC_PREFETCH_CONFIG1);
gpmc_context.prefetch_config2 = gpmc_read_reg(GPMC_PREFETCH_CONFIG2);
gpmc_context.prefetch_control = gpmc_read_reg(GPMC_PREFETCH_CONTROL);
for (i = 0; i < GPMC_CS_NUM; i++) {
gpmc_context.cs_context[i].is_valid = gpmc_cs_mem_enabled(i);
if (gpmc_context.cs_context[i].is_valid) {
gpmc_context.cs_context[i].config1 =
gpmc_cs_read_reg(i, GPMC_CS_CONFIG1);
gpmc_context.cs_context[i].config2 =
gpmc_cs_read_reg(i, GPMC_CS_CONFIG2);
gpmc_context.cs_context[i].config3 =
gpmc_cs_read_reg(i, GPMC_CS_CONFIG3);
gpmc_context.cs_context[i].config4 =
gpmc_cs_read_reg(i, GPMC_CS_CONFIG4);
gpmc_context.cs_context[i].config5 =
gpmc_cs_read_reg(i, GPMC_CS_CONFIG5);
gpmc_context.cs_context[i].config6 =
gpmc_cs_read_reg(i, GPMC_CS_CONFIG6);
gpmc_context.cs_context[i].config7 =
gpmc_cs_read_reg(i, GPMC_CS_CONFIG7);
}
}
}
void omap3_gpmc_restore_context(void)
{
int i;
gpmc_write_reg(GPMC_SYSCONFIG, gpmc_context.sysconfig);
gpmc_write_reg(GPMC_IRQENABLE, gpmc_context.irqenable);
gpmc_write_reg(GPMC_TIMEOUT_CONTROL, gpmc_context.timeout_ctrl);
gpmc_write_reg(GPMC_CONFIG, gpmc_context.config);
gpmc_write_reg(GPMC_PREFETCH_CONFIG1, gpmc_context.prefetch_config1);
gpmc_write_reg(GPMC_PREFETCH_CONFIG2, gpmc_context.prefetch_config2);
gpmc_write_reg(GPMC_PREFETCH_CONTROL, gpmc_context.prefetch_control);
for (i = 0; i < GPMC_CS_NUM; i++) {
if (gpmc_context.cs_context[i].is_valid) {
gpmc_cs_write_reg(i, GPMC_CS_CONFIG1,
gpmc_context.cs_context[i].config1);
gpmc_cs_write_reg(i, GPMC_CS_CONFIG2,
gpmc_context.cs_context[i].config2);
gpmc_cs_write_reg(i, GPMC_CS_CONFIG3,
gpmc_context.cs_context[i].config3);
gpmc_cs_write_reg(i, GPMC_CS_CONFIG4,
gpmc_context.cs_context[i].config4);
gpmc_cs_write_reg(i, GPMC_CS_CONFIG5,
gpmc_context.cs_context[i].config5);
gpmc_cs_write_reg(i, GPMC_CS_CONFIG6,
gpmc_context.cs_context[i].config6);
gpmc_cs_write_reg(i, GPMC_CS_CONFIG7,
gpmc_context.cs_context[i].config7);
}
}
}
#endif /* CONFIG_ARCH_OMAP3 */
/**
* gpmc_enable_hwecc - enable hardware ecc functionality
* @cs: chip select number
* @mode: read/write mode
* @dev_width: device bus width(1 for x16, 0 for x8)
* @ecc_size: bytes for which ECC will be generated
*/
int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size)
{
unsigned int val;
/* check if ecc module is in used */
if (gpmc_ecc_used != -EINVAL)
return -EINVAL;
gpmc_ecc_used = cs;
/* clear ecc and enable bits */
val = ((0x00000001<<8) | 0x00000001);
gpmc_write_reg(GPMC_ECC_CONTROL, val);
/* program ecc and result sizes */
val = ((((ecc_size >> 1) - 1) << 22) | (0x0000000F));
gpmc_write_reg(GPMC_ECC_SIZE_CONFIG, val);
switch (mode) {
case GPMC_ECC_READ:
gpmc_write_reg(GPMC_ECC_CONTROL, 0x101);
break;
case GPMC_ECC_READSYN:
gpmc_write_reg(GPMC_ECC_CONTROL, 0x100);
break;
case GPMC_ECC_WRITE:
gpmc_write_reg(GPMC_ECC_CONTROL, 0x101);
break;
default:
printk(KERN_INFO "Error: Unrecognized Mode[%d]!\n", mode);
break;
}
/* (ECC 16 or 8 bit col) | ( CS ) | ECC Enable */
val = (dev_width << 7) | (cs << 1) | (0x1);
gpmc_write_reg(GPMC_ECC_CONFIG, val);
return 0;
}
/**
* gpmc_calculate_ecc - generate non-inverted ecc bytes
* @cs: chip select number
* @dat: data pointer over which ecc is computed
* @ecc_code: ecc code buffer
*
* Using non-inverted ECC is considered ugly since writing a blank
* page (padding) will clear the ECC bytes. This is not a problem as long
* no one is trying to write data on the seemingly unused page. Reading
* an erased page will produce an ECC mismatch between generated and read
* ECC bytes that has to be dealt with separately.
*/
int gpmc_calculate_ecc(int cs, const u_char *dat, u_char *ecc_code)
{
unsigned int val = 0x0;
if (gpmc_ecc_used != cs)
return -EINVAL;
/* read ecc result */
val = gpmc_read_reg(GPMC_ECC1_RESULT);
*ecc_code++ = val; /* P128e, ..., P1e */
*ecc_code++ = val >> 16; /* P128o, ..., P1o */
/* P2048o, P1024o, P512o, P256o, P2048e, P1024e, P512e, P256e */
*ecc_code++ = ((val >> 8) & 0x0f) | ((val >> 20) & 0xf0);
gpmc_ecc_used = -EINVAL;
return 0;
}
/*
* Copyright © 2004 Texas Instruments, Jian Zhang <jzhang@ti.com>
* Copyright © 2004 Micron Technology Inc.
* Copyright © 2004 David Brownell
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/jiffies.h>
#include <linux/sched.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/io.h>
#include <linux/slab.h>
#include <plat/dma.h>
#include <plat/gpmc.h>
#include <plat/nand.h>
#define DRIVER_NAME "omap2-nand"
#define OMAP_NAND_TIMEOUT_MS 5000
#define NAND_Ecc_P1e (1 << 0)
#define NAND_Ecc_P2e (1 << 1)
#define NAND_Ecc_P4e (1 << 2)
#define NAND_Ecc_P8e (1 << 3)
#define NAND_Ecc_P16e (1 << 4)
#define NAND_Ecc_P32e (1 << 5)
#define NAND_Ecc_P64e (1 << 6)
#define NAND_Ecc_P128e (1 << 7)
#define NAND_Ecc_P256e (1 << 8)
#define NAND_Ecc_P512e (1 << 9)
#define NAND_Ecc_P1024e (1 << 10)
#define NAND_Ecc_P2048e (1 << 11)
#define NAND_Ecc_P1o (1 << 16)
#define NAND_Ecc_P2o (1 << 17)
#define NAND_Ecc_P4o (1 << 18)
#define NAND_Ecc_P8o (1 << 19)
#define NAND_Ecc_P16o (1 << 20)
#define NAND_Ecc_P32o (1 << 21)
#define NAND_Ecc_P64o (1 << 22)
#define NAND_Ecc_P128o (1 << 23)
#define NAND_Ecc_P256o (1 << 24)
#define NAND_Ecc_P512o (1 << 25)
#define NAND_Ecc_P1024o (1 << 26)
#define NAND_Ecc_P2048o (1 << 27)
#define TF(value) (value ? 1 : 0)
#define P2048e(a) (TF(a & NAND_Ecc_P2048e) << 0)
#define P2048o(a) (TF(a & NAND_Ecc_P2048o) << 1)
#define P1e(a) (TF(a & NAND_Ecc_P1e) << 2)
#define P1o(a) (TF(a & NAND_Ecc_P1o) << 3)
#define P2e(a) (TF(a & NAND_Ecc_P2e) << 4)
#define P2o(a) (TF(a & NAND_Ecc_P2o) << 5)
#define P4e(a) (TF(a & NAND_Ecc_P4e) << 6)
#define P4o(a) (TF(a & NAND_Ecc_P4o) << 7)
#define P8e(a) (TF(a & NAND_Ecc_P8e) << 0)
#define P8o(a) (TF(a & NAND_Ecc_P8o) << 1)
#define P16e(a) (TF(a & NAND_Ecc_P16e) << 2)
#define P16o(a) (TF(a & NAND_Ecc_P16o) << 3)
#define P32e(a) (TF(a & NAND_Ecc_P32e) << 4)
#define P32o(a) (TF(a & NAND_Ecc_P32o) << 5)
#define P64e(a) (TF(a & NAND_Ecc_P64e) << 6)
#define P64o(a) (TF(a & NAND_Ecc_P64o) << 7)
#define P128e(a) (TF(a & NAND_Ecc_P128e) << 0)
#define P128o(a) (TF(a & NAND_Ecc_P128o) << 1)
#define P256e(a) (TF(a & NAND_Ecc_P256e) << 2)
#define P256o(a) (TF(a & NAND_Ecc_P256o) << 3)
#define P512e(a) (TF(a & NAND_Ecc_P512e) << 4)
#define P512o(a) (TF(a & NAND_Ecc_P512o) << 5)
#define P1024e(a) (TF(a & NAND_Ecc_P1024e) << 6)
#define P1024o(a) (TF(a & NAND_Ecc_P1024o) << 7)
#define P8e_s(a) (TF(a & NAND_Ecc_P8e) << 0)
#define P8o_s(a) (TF(a & NAND_Ecc_P8o) << 1)
#define P16e_s(a) (TF(a & NAND_Ecc_P16e) << 2)
#define P16o_s(a) (TF(a & NAND_Ecc_P16o) << 3)
#define P1e_s(a) (TF(a & NAND_Ecc_P1e) << 4)
#define P1o_s(a) (TF(a & NAND_Ecc_P1o) << 5)
#define P2e_s(a) (TF(a & NAND_Ecc_P2e) << 6)
#define P2o_s(a) (TF(a & NAND_Ecc_P2o) << 7)
#define P4e_s(a) (TF(a & NAND_Ecc_P4e) << 0)
#define P4o_s(a) (TF(a & NAND_Ecc_P4o) << 1)
#define MAX_HWECC_BYTES_OOB_64 24
#define JFFS2_CLEAN_MARKER_OFFSET 0x2
static const char *part_probes[] = { "cmdlinepart", NULL };
/* oob info generated runtime depending on ecc algorithm and layout selected */
static struct nand_ecclayout omap_oobinfo;
/* Define some generic bad / good block scan pattern which are used
* while scanning a device for factory marked good / bad blocks
*/
static uint8_t scan_ff_pattern[] = { 0xff };
static struct nand_bbt_descr bb_descrip_flashbased = {
.options = NAND_BBT_SCANEMPTY | NAND_BBT_SCANALLPAGES,
.offs = 0,
.len = 1,
.pattern = scan_ff_pattern,
};
struct omap_nand_info {
struct nand_hw_control controller;
struct omap_nand_platform_data *pdata;
struct mtd_info mtd;
struct mtd_partition *parts;
struct nand_chip nand;
struct platform_device *pdev;
int gpmc_cs;
unsigned long phys_base;
struct completion comp;
int dma_ch;
int gpmc_irq;
enum {
OMAP_NAND_IO_READ = 0, /* read */
OMAP_NAND_IO_WRITE, /* write */
} iomode;
u_char *buf;
int buf_len;
};
/**
* omap_hwcontrol - hardware specific access to control-lines
* @mtd: MTD device structure
* @cmd: command to device
* @ctrl:
* NAND_NCE: bit 0 -> don't care
* NAND_CLE: bit 1 -> Command Latch
* NAND_ALE: bit 2 -> Address Latch
*
* NOTE: boards may use different bits for these!!
*/
static void omap_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{
struct omap_nand_info *info = container_of(mtd,
struct omap_nand_info, mtd);
if (cmd != NAND_CMD_NONE) {
if (ctrl & NAND_CLE)
gpmc_nand_write(info->gpmc_cs, GPMC_NAND_COMMAND, cmd);
else if (ctrl & NAND_ALE)
gpmc_nand_write(info->gpmc_cs, GPMC_NAND_ADDRESS, cmd);
else /* NAND_NCE */
gpmc_nand_write(info->gpmc_cs, GPMC_NAND_DATA, cmd);
}
}
/**
* omap_read_buf8 - read data from NAND controller into buffer
* @mtd: MTD device structure
* @buf: buffer to store date
* @len: number of bytes to read
*/
static void omap_read_buf8(struct mtd_info *mtd, u_char *buf, int len)
{
struct nand_chip *nand = mtd->priv;
ioread8_rep(nand->IO_ADDR_R, buf, len);
}
/**
* omap_write_buf8 - write buffer to NAND controller
* @mtd: MTD device structure
* @buf: data buffer
* @len: number of bytes to write
*/
static void omap_write_buf8(struct mtd_info *mtd, const u_char *buf, int len)
{
struct omap_nand_info *info = container_of(mtd,
struct omap_nand_info, mtd);
u_char *p = (u_char *)buf;
u32 status = 0;
while (len--) {
iowrite8(*p++, info->nand.IO_ADDR_W);
/* wait until buffer is available for write */
do {
status = gpmc_read_status(GPMC_STATUS_BUFFER);
} while (!status);
}
}
/**
* omap_read_buf16 - read data from NAND controller into buffer
* @mtd: MTD device structure
* @buf: buffer to store date
* @len: number of bytes to read
*/
static void omap_read_buf16(struct mtd_info *mtd, u_char *buf, int len)
{
struct nand_chip *nand = mtd->priv;
ioread16_rep(nand->IO_ADDR_R, buf, len / 2);
}
/**
* omap_write_buf16 - write buffer to NAND controller
* @mtd: MTD device structure
* @buf: data buffer
* @len: number of bytes to write
*/
static void omap_write_buf16(struct mtd_info *mtd, const u_char * buf, int len)
{
struct omap_nand_info *info = container_of(mtd,
struct omap_nand_info, mtd);
u16 *p = (u16 *) buf;
u32 status = 0;
/* FIXME try bursts of writesw() or DMA ... */
len >>= 1;
while (len--) {
iowrite16(*p++, info->nand.IO_ADDR_W);
/* wait until buffer is available for write */
do {
status = gpmc_read_status(GPMC_STATUS_BUFFER);
} while (!status);
}
}
/**
* omap_read_buf_pref - read data from NAND controller into buffer
* @mtd: MTD device structure
* @buf: buffer to store date
* @len: number of bytes to read
*/
static void omap_read_buf_pref(struct mtd_info *mtd, u_char *buf, int len)
{
struct omap_nand_info *info = container_of(mtd,
struct omap_nand_info, mtd);
uint32_t r_count = 0;
int ret = 0;
u32 *p = (u32 *)buf;
/* take care of subpage reads */
if (len % 4) {
if (info->nand.options & NAND_BUSWIDTH_16)
omap_read_buf16(mtd, buf, len % 4);
else
omap_read_buf8(mtd, buf, len % 4);
p = (u32 *) (buf + len % 4);
len -= len % 4;
}
/* configure and start prefetch transfer */
ret = gpmc_prefetch_enable(info->gpmc_cs,
PREFETCH_FIFOTHRESHOLD_MAX, 0x0, len, 0x0);
if (ret) {
/* PFPW engine is busy, use cpu copy method */
if (info->nand.options & NAND_BUSWIDTH_16)
omap_read_buf16(mtd, (u_char *)p, len);
else
omap_read_buf8(mtd, (u_char *)p, len);
} else {
do {
r_count = gpmc_read_status(GPMC_PREFETCH_FIFO_CNT);
r_count = r_count >> 2;
ioread32_rep(info->nand.IO_ADDR_R, p, r_count);
p += r_count;
len -= r_count << 2;
} while (len);
/* disable and stop the PFPW engine */
gpmc_prefetch_reset(info->gpmc_cs);
}
}
/**
* omap_write_buf_pref - write buffer to NAND controller
* @mtd: MTD device structure
* @buf: data buffer
* @len: number of bytes to write
*/
static void omap_write_buf_pref(struct mtd_info *mtd,
const u_char *buf, int len)
{
struct omap_nand_info *info = container_of(mtd,
struct omap_nand_info, mtd);
uint32_t w_count = 0;
int i = 0, ret = 0;
u16 *p = (u16 *)buf;
unsigned long tim, limit;
/* take care of subpage writes */
if (len % 2 != 0) {
writeb(*buf, info->nand.IO_ADDR_W);
p = (u16 *)(buf + 1);
len--;
}
/* configure and start prefetch transfer */
ret = gpmc_prefetch_enable(info->gpmc_cs,
PREFETCH_FIFOTHRESHOLD_MAX, 0x0, len, 0x1);
if (ret) {
/* PFPW engine is busy, use cpu copy method */
if (info->nand.options & NAND_BUSWIDTH_16)
omap_write_buf16(mtd, (u_char *)p, len);
else
omap_write_buf8(mtd, (u_char *)p, len);
} else {
while (len) {
w_count = gpmc_read_status(GPMC_PREFETCH_FIFO_CNT);
w_count = w_count >> 1;
for (i = 0; (i < w_count) && len; i++, len -= 2)
iowrite16(*p++, info->nand.IO_ADDR_W);
}
/* wait for data to flushed-out before reset the prefetch */
tim = 0;
limit = (loops_per_jiffy *
msecs_to_jiffies(OMAP_NAND_TIMEOUT_MS));
while (gpmc_read_status(GPMC_PREFETCH_COUNT) && (tim++ < limit))
cpu_relax();
/* disable and stop the PFPW engine */
gpmc_prefetch_reset(info->gpmc_cs);
}
}
/*
* omap_nand_dma_cb: callback on the completion of dma transfer
* @lch: logical channel
* @ch_satuts: channel status
* @data: pointer to completion data structure
*/
static void omap_nand_dma_cb(int lch, u16 ch_status, void *data)
{
complete((struct completion *) data);
}
/*
* omap_nand_dma_transfer: configer and start dma transfer
* @mtd: MTD device structure
* @addr: virtual address in RAM of source/destination
* @len: number of data bytes to be transferred
* @is_write: flag for read/write operation
*/
static inline int omap_nand_dma_transfer(struct mtd_info *mtd, void *addr,
unsigned int len, int is_write)
{
struct omap_nand_info *info = container_of(mtd,
struct omap_nand_info, mtd);
enum dma_data_direction dir = is_write ? DMA_TO_DEVICE :
DMA_FROM_DEVICE;
dma_addr_t dma_addr;
int ret;
unsigned long tim, limit;
/* The fifo depth is 64 bytes max.
* But configure the FIFO-threahold to 32 to get a sync at each frame
* and frame length is 32 bytes.
*/
int buf_len = len >> 6;
if (addr >= high_memory) {
struct page *p1;
if (((size_t)addr & PAGE_MASK) !=
((size_t)(addr + len - 1) & PAGE_MASK))
goto out_copy;
p1 = vmalloc_to_page(addr);
if (!p1)
goto out_copy;
addr = page_address(p1) + ((size_t)addr & ~PAGE_MASK);
}
dma_addr = dma_map_single(&info->pdev->dev, addr, len, dir);
if (dma_mapping_error(&info->pdev->dev, dma_addr)) {
dev_err(&info->pdev->dev,
"Couldn't DMA map a %d byte buffer\n", len);
goto out_copy;
}
if (is_write) {
omap_set_dma_dest_params(info->dma_ch, 0, OMAP_DMA_AMODE_CONSTANT,
info->phys_base, 0, 0);
omap_set_dma_src_params(info->dma_ch, 0, OMAP_DMA_AMODE_POST_INC,
dma_addr, 0, 0);
omap_set_dma_transfer_params(info->dma_ch, OMAP_DMA_DATA_TYPE_S32,
0x10, buf_len, OMAP_DMA_SYNC_FRAME,
OMAP24XX_DMA_GPMC, OMAP_DMA_DST_SYNC);
} else {
omap_set_dma_src_params(info->dma_ch, 0, OMAP_DMA_AMODE_CONSTANT,
info->phys_base, 0, 0);
omap_set_dma_dest_params(info->dma_ch, 0, OMAP_DMA_AMODE_POST_INC,
dma_addr, 0, 0);
omap_set_dma_transfer_params(info->dma_ch, OMAP_DMA_DATA_TYPE_S32,
0x10, buf_len, OMAP_DMA_SYNC_FRAME,
OMAP24XX_DMA_GPMC, OMAP_DMA_SRC_SYNC);
}
/* configure and start prefetch transfer */
ret = gpmc_prefetch_enable(info->gpmc_cs,
PREFETCH_FIFOTHRESHOLD_MAX, 0x1, len, is_write);
if (ret)
/* PFPW engine is busy, use cpu copy method */
goto out_copy;
init_completion(&info->comp);
omap_start_dma(info->dma_ch);
/* setup and start DMA using dma_addr */
wait_for_completion(&info->comp);
tim = 0;
limit = (loops_per_jiffy * msecs_to_jiffies(OMAP_NAND_TIMEOUT_MS));
while (gpmc_read_status(GPMC_PREFETCH_COUNT) && (tim++ < limit))
cpu_relax();
/* disable and stop the PFPW engine */
gpmc_prefetch_reset(info->gpmc_cs);
dma_unmap_single(&info->pdev->dev, dma_addr, len, dir);
return 0;
out_copy:
if (info->nand.options & NAND_BUSWIDTH_16)
is_write == 0 ? omap_read_buf16(mtd, (u_char *) addr, len)
: omap_write_buf16(mtd, (u_char *) addr, len);
else
is_write == 0 ? omap_read_buf8(mtd, (u_char *) addr, len)
: omap_write_buf8(mtd, (u_char *) addr, len);
return 0;
}
/**
* omap_read_buf_dma_pref - read data from NAND controller into buffer
* @mtd: MTD device structure
* @buf: buffer to store date
* @len: number of bytes to read
*/
static void omap_read_buf_dma_pref(struct mtd_info *mtd, u_char *buf, int len)
{
if (len <= mtd->oobsize)
omap_read_buf_pref(mtd, buf, len);
else
/* start transfer in DMA mode */
omap_nand_dma_transfer(mtd, buf, len, 0x0);
}
/**
* omap_write_buf_dma_pref - write buffer to NAND controller
* @mtd: MTD device structure
* @buf: data buffer
* @len: number of bytes to write
*/
static void omap_write_buf_dma_pref(struct mtd_info *mtd,
const u_char *buf, int len)
{
if (len <= mtd->oobsize)
omap_write_buf_pref(mtd, buf, len);
else
/* start transfer in DMA mode */
omap_nand_dma_transfer(mtd, (u_char *) buf, len, 0x1);
}
/*
* omap_nand_irq - GMPC irq handler
* @this_irq: gpmc irq number
* @dev: omap_nand_info structure pointer is passed here
*/
static irqreturn_t omap_nand_irq(int this_irq, void *dev)
{
struct omap_nand_info *info = (struct omap_nand_info *) dev;
u32 bytes;
u32 irq_stat;
irq_stat = gpmc_read_status(GPMC_GET_IRQ_STATUS);
bytes = gpmc_read_status(GPMC_PREFETCH_FIFO_CNT);
bytes = bytes & 0xFFFC; /* io in multiple of 4 bytes */
if (info->iomode == OMAP_NAND_IO_WRITE) { /* checks for write io */
if (irq_stat & 0x2)
goto done;
if (info->buf_len && (info->buf_len < bytes))
bytes = info->buf_len;
else if (!info->buf_len)
bytes = 0;
iowrite32_rep(info->nand.IO_ADDR_W,
(u32 *)info->buf, bytes >> 2);
info->buf = info->buf + bytes;
info->buf_len -= bytes;
} else {
ioread32_rep(info->nand.IO_ADDR_R,
(u32 *)info->buf, bytes >> 2);
info->buf = info->buf + bytes;
if (irq_stat & 0x2)
goto done;
}
gpmc_cs_configure(info->gpmc_cs, GPMC_SET_IRQ_STATUS, irq_stat);
return IRQ_HANDLED;
done:
complete(&info->comp);
/* disable irq */
gpmc_cs_configure(info->gpmc_cs, GPMC_ENABLE_IRQ, 0);
/* clear status */
gpmc_cs_configure(info->gpmc_cs, GPMC_SET_IRQ_STATUS, irq_stat);
return IRQ_HANDLED;
}
/*
* omap_read_buf_irq_pref - read data from NAND controller into buffer
* @mtd: MTD device structure
* @buf: buffer to store date
* @len: number of bytes to read
*/
static void omap_read_buf_irq_pref(struct mtd_info *mtd, u_char *buf, int len)
{
struct omap_nand_info *info = container_of(mtd,
struct omap_nand_info, mtd);
int ret = 0;
if (len <= mtd->oobsize) {
omap_read_buf_pref(mtd, buf, len);
return;
}
info->iomode = OMAP_NAND_IO_READ;
info->buf = buf;
init_completion(&info->comp);
/* configure and start prefetch transfer */
ret = gpmc_prefetch_enable(info->gpmc_cs,
PREFETCH_FIFOTHRESHOLD_MAX/2, 0x0, len, 0x0);
if (ret)
/* PFPW engine is busy, use cpu copy method */
goto out_copy;
info->buf_len = len;
/* enable irq */
gpmc_cs_configure(info->gpmc_cs, GPMC_ENABLE_IRQ,
(GPMC_IRQ_FIFOEVENTENABLE | GPMC_IRQ_COUNT_EVENT));
/* waiting for read to complete */
wait_for_completion(&info->comp);
/* disable and stop the PFPW engine */
gpmc_prefetch_reset(info->gpmc_cs);
return;
out_copy:
if (info->nand.options & NAND_BUSWIDTH_16)
omap_read_buf16(mtd, buf, len);
else
omap_read_buf8(mtd, buf, len);
}
/*
* omap_write_buf_irq_pref - write buffer to NAND controller
* @mtd: MTD device structure
* @buf: data buffer
* @len: number of bytes to write
*/
static void omap_write_buf_irq_pref(struct mtd_info *mtd,
const u_char *buf, int len)
{
struct omap_nand_info *info = container_of(mtd,
struct omap_nand_info, mtd);
int ret = 0;
unsigned long tim, limit;
if (len <= mtd->oobsize) {
omap_write_buf_pref(mtd, buf, len);
return;
}
info->iomode = OMAP_NAND_IO_WRITE;
info->buf = (u_char *) buf;
init_completion(&info->comp);
/* configure and start prefetch transfer : size=24 */
ret = gpmc_prefetch_enable(info->gpmc_cs,
(PREFETCH_FIFOTHRESHOLD_MAX * 3) / 8, 0x0, len, 0x1);
if (ret)
/* PFPW engine is busy, use cpu copy method */
goto out_copy;
info->buf_len = len;
/* enable irq */
gpmc_cs_configure(info->gpmc_cs, GPMC_ENABLE_IRQ,
(GPMC_IRQ_FIFOEVENTENABLE | GPMC_IRQ_COUNT_EVENT));
/* waiting for write to complete */
wait_for_completion(&info->comp);
/* wait for data to flushed-out before reset the prefetch */
tim = 0;
limit = (loops_per_jiffy * msecs_to_jiffies(OMAP_NAND_TIMEOUT_MS));
while (gpmc_read_status(GPMC_PREFETCH_COUNT) && (tim++ < limit))
cpu_relax();
/* disable and stop the PFPW engine */
gpmc_prefetch_reset(info->gpmc_cs);
return;
out_copy:
if (info->nand.options & NAND_BUSWIDTH_16)
omap_write_buf16(mtd, buf, len);
else
omap_write_buf8(mtd, buf, len);
}
/**
* omap_verify_buf - Verify chip data against buffer
* @mtd: MTD device structure
* @buf: buffer containing the data to compare
* @len: number of bytes to compare
*/
static int omap_verify_buf(struct mtd_info *mtd, const u_char * buf, int len)
{
struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
mtd);
u16 *p = (u16 *) buf;
len >>= 1;
while (len--) {
if (*p++ != cpu_to_le16(readw(info->nand.IO_ADDR_R)))
return -EFAULT;
}
return 0;
}
/**
* gen_true_ecc - This function will generate true ECC value
* @ecc_buf: buffer to store ecc code
*
* This generated true ECC value can be used when correcting
* data read from NAND flash memory core
*/
static void gen_true_ecc(u8 *ecc_buf)
{
u32 tmp = ecc_buf[0] | (ecc_buf[1] << 16) |
((ecc_buf[2] & 0xF0) << 20) | ((ecc_buf[2] & 0x0F) << 8);
ecc_buf[0] = ~(P64o(tmp) | P64e(tmp) | P32o(tmp) | P32e(tmp) |
P16o(tmp) | P16e(tmp) | P8o(tmp) | P8e(tmp));
ecc_buf[1] = ~(P1024o(tmp) | P1024e(tmp) | P512o(tmp) | P512e(tmp) |
P256o(tmp) | P256e(tmp) | P128o(tmp) | P128e(tmp));
ecc_buf[2] = ~(P4o(tmp) | P4e(tmp) | P2o(tmp) | P2e(tmp) | P1o(tmp) |
P1e(tmp) | P2048o(tmp) | P2048e(tmp));
}
/**
* omap_compare_ecc - Detect (2 bits) and correct (1 bit) error in data
* @ecc_data1: ecc code from nand spare area
* @ecc_data2: ecc code from hardware register obtained from hardware ecc
* @page_data: page data
*
* This function compares two ECC's and indicates if there is an error.
* If the error can be corrected it will be corrected to the buffer.
* If there is no error, %0 is returned. If there is an error but it
* was corrected, %1 is returned. Otherwise, %-1 is returned.
*/
static int omap_compare_ecc(u8 *ecc_data1, /* read from NAND memory */
u8 *ecc_data2, /* read from register */
u8 *page_data)
{
uint i;
u8 tmp0_bit[8], tmp1_bit[8], tmp2_bit[8];
u8 comp0_bit[8], comp1_bit[8], comp2_bit[8];
u8 ecc_bit[24];
u8 ecc_sum = 0;
u8 find_bit = 0;
uint find_byte = 0;
int isEccFF;
isEccFF = ((*(u32 *)ecc_data1 & 0xFFFFFF) == 0xFFFFFF);
gen_true_ecc(ecc_data1);
gen_true_ecc(ecc_data2);
for (i = 0; i <= 2; i++) {
*(ecc_data1 + i) = ~(*(ecc_data1 + i));
*(ecc_data2 + i) = ~(*(ecc_data2 + i));
}
for (i = 0; i < 8; i++) {
tmp0_bit[i] = *ecc_data1 % 2;
*ecc_data1 = *ecc_data1 / 2;
}
for (i = 0; i < 8; i++) {
tmp1_bit[i] = *(ecc_data1 + 1) % 2;
*(ecc_data1 + 1) = *(ecc_data1 + 1) / 2;
}
for (i = 0; i < 8; i++) {
tmp2_bit[i] = *(ecc_data1 + 2) % 2;
*(ecc_data1 + 2) = *(ecc_data1 + 2) / 2;
}
for (i = 0; i < 8; i++) {
comp0_bit[i] = *ecc_data2 % 2;
*ecc_data2 = *ecc_data2 / 2;
}
for (i = 0; i < 8; i++) {
comp1_bit[i] = *(ecc_data2 + 1) % 2;
*(ecc_data2 + 1) = *(ecc_data2 + 1) / 2;
}
for (i = 0; i < 8; i++) {
comp2_bit[i] = *(ecc_data2 + 2) % 2;
*(ecc_data2 + 2) = *(ecc_data2 + 2) / 2;
}
for (i = 0; i < 6; i++)
ecc_bit[i] = tmp2_bit[i + 2] ^ comp2_bit[i + 2];
for (i = 0; i < 8; i++)
ecc_bit[i + 6] = tmp0_bit[i] ^ comp0_bit[i];
for (i = 0; i < 8; i++)
ecc_bit[i + 14] = tmp1_bit[i] ^ comp1_bit[i];
ecc_bit[22] = tmp2_bit[0] ^ comp2_bit[0];
ecc_bit[23] = tmp2_bit[1] ^ comp2_bit[1];
for (i = 0; i < 24; i++)
ecc_sum += ecc_bit[i];
switch (ecc_sum) {
case 0:
/* Not reached because this function is not called if
* ECC values are equal
*/
return 0;
case 1:
/* Uncorrectable error */
DEBUG(MTD_DEBUG_LEVEL0, "ECC UNCORRECTED_ERROR 1\n");
return -1;
case 11:
/* UN-Correctable error */
DEBUG(MTD_DEBUG_LEVEL0, "ECC UNCORRECTED_ERROR B\n");
return -1;
case 12:
/* Correctable error */
find_byte = (ecc_bit[23] << 8) +
(ecc_bit[21] << 7) +
(ecc_bit[19] << 6) +
(ecc_bit[17] << 5) +
(ecc_bit[15] << 4) +
(ecc_bit[13] << 3) +
(ecc_bit[11] << 2) +
(ecc_bit[9] << 1) +
ecc_bit[7];
find_bit = (ecc_bit[5] << 2) + (ecc_bit[3] << 1) + ecc_bit[1];
DEBUG(MTD_DEBUG_LEVEL0, "Correcting single bit ECC error at "
"offset: %d, bit: %d\n", find_byte, find_bit);
page_data[find_byte] ^= (1 << find_bit);
return 1;
default:
if (isEccFF) {
if (ecc_data2[0] == 0 &&
ecc_data2[1] == 0 &&
ecc_data2[2] == 0)
return 0;
}
DEBUG(MTD_DEBUG_LEVEL0, "UNCORRECTED_ERROR default\n");
return -1;
}
}
/**
* omap_correct_data - Compares the ECC read with HW generated ECC
* @mtd: MTD device structure
* @dat: page data
* @read_ecc: ecc read from nand flash
* @calc_ecc: ecc read from HW ECC registers
*
* Compares the ecc read from nand spare area with ECC registers values
* and if ECC's mismatched, it will call 'omap_compare_ecc' for error
* detection and correction. If there are no errors, %0 is returned. If
* there were errors and all of the errors were corrected, the number of
* corrected errors is returned. If uncorrectable errors exist, %-1 is
* returned.
*/
static int omap_correct_data(struct mtd_info *mtd, u_char *dat,
u_char *read_ecc, u_char *calc_ecc)
{
struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
mtd);
int blockCnt = 0, i = 0, ret = 0;
int stat = 0;
/* Ex NAND_ECC_HW12_2048 */
if ((info->nand.ecc.mode == NAND_ECC_HW) &&
(info->nand.ecc.size == 2048))
blockCnt = 4;
else
blockCnt = 1;
for (i = 0; i < blockCnt; i++) {
if (memcmp(read_ecc, calc_ecc, 3) != 0) {
ret = omap_compare_ecc(read_ecc, calc_ecc, dat);
if (ret < 0)
return ret;
/* keep track of the number of corrected errors */
stat += ret;
}
read_ecc += 3;
calc_ecc += 3;
dat += 512;
}
return stat;
}
/**
* omap_calcuate_ecc - Generate non-inverted ECC bytes.
* @mtd: MTD device structure
* @dat: The pointer to data on which ecc is computed
* @ecc_code: The ecc_code buffer
*
* Using noninverted ECC can be considered ugly since writing a blank
* page ie. padding will clear the ECC bytes. This is no problem as long
* nobody is trying to write data on the seemingly unused page. Reading
* an erased page will produce an ECC mismatch between generated and read
* ECC bytes that has to be dealt with separately.
*/
static int omap_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
u_char *ecc_code)
{
struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
mtd);
return gpmc_calculate_ecc(info->gpmc_cs, dat, ecc_code);
}
/**
* omap_enable_hwecc - This function enables the hardware ecc functionality
* @mtd: MTD device structure
* @mode: Read/Write mode
*/
static void omap_enable_hwecc(struct mtd_info *mtd, int mode)
{
struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
mtd);
struct nand_chip *chip = mtd->priv;
unsigned int dev_width = (chip->options & NAND_BUSWIDTH_16) ? 1 : 0;
gpmc_enable_hwecc(info->gpmc_cs, mode, dev_width, info->nand.ecc.size);
}
/**
* omap_wait - wait until the command is done
* @mtd: MTD device structure
* @chip: NAND Chip structure
*
* Wait function is called during Program and erase operations and
* the way it is called from MTD layer, we should wait till the NAND
* chip is ready after the programming/erase operation has completed.
*
* Erase can take up to 400ms and program up to 20ms according to
* general NAND and SmartMedia specs
*/
static int omap_wait(struct mtd_info *mtd, struct nand_chip *chip)
{
struct nand_chip *this = mtd->priv;
struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
mtd);
unsigned long timeo = jiffies;
int status = NAND_STATUS_FAIL, state = this->state;
if (state == FL_ERASING)
timeo += (HZ * 400) / 1000;
else
timeo += (HZ * 20) / 1000;
gpmc_nand_write(info->gpmc_cs,
GPMC_NAND_COMMAND, (NAND_CMD_STATUS & 0xFF));
while (time_before(jiffies, timeo)) {
status = gpmc_nand_read(info->gpmc_cs, GPMC_NAND_DATA);
if (status & NAND_STATUS_READY)
break;
cond_resched();
}
return status;
}
/**
* omap_dev_ready - calls the platform specific dev_ready function
* @mtd: MTD device structure
*/
static int omap_dev_ready(struct mtd_info *mtd)
{
unsigned int val = 0;
struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
mtd);
val = gpmc_read_status(GPMC_GET_IRQ_STATUS);
if ((val & 0x100) == 0x100) {
/* Clear IRQ Interrupt */
val |= 0x100;
val &= ~(0x0);
gpmc_cs_configure(info->gpmc_cs, GPMC_SET_IRQ_STATUS, val);
} else {
unsigned int cnt = 0;
while (cnt++ < 0x1FF) {
if ((val & 0x100) == 0x100)
return 0;
val = gpmc_read_status(GPMC_GET_IRQ_STATUS);
}
}
return 1;
}
static int __devinit omap_nand_probe(struct platform_device *pdev)
{
struct omap_nand_info *info;
struct omap_nand_platform_data *pdata;
int err;
int i, offset;
pdata = pdev->dev.platform_data;
if (pdata == NULL) {
dev_err(&pdev->dev, "platform data missing\n");
return -ENODEV;
}
info = kzalloc(sizeof(struct omap_nand_info), GFP_KERNEL);
if (!info)
return -ENOMEM;
platform_set_drvdata(pdev, info);
spin_lock_init(&info->controller.lock);
init_waitqueue_head(&info->controller.wq);
info->pdev = pdev;
info->gpmc_cs = pdata->cs;
info->phys_base = pdata->phys_base;
info->mtd.priv = &info->nand;
info->mtd.name = dev_name(&pdev->dev);
info->mtd.owner = THIS_MODULE;
info->nand.options = pdata->devsize;
info->nand.options |= NAND_SKIP_BBTSCAN;
/* NAND write protect off */
gpmc_cs_configure(info->gpmc_cs, GPMC_CONFIG_WP, 0);
if (!request_mem_region(info->phys_base, NAND_IO_SIZE,
pdev->dev.driver->name)) {
err = -EBUSY;
goto out_free_info;
}
info->nand.IO_ADDR_R = ioremap(info->phys_base, NAND_IO_SIZE);
if (!info->nand.IO_ADDR_R) {
err = -ENOMEM;
goto out_release_mem_region;
}
info->nand.controller = &info->controller;
info->nand.IO_ADDR_W = info->nand.IO_ADDR_R;
info->nand.cmd_ctrl = omap_hwcontrol;
/*
* If RDY/BSY line is connected to OMAP then use the omap ready
* funcrtion and the generic nand_wait function which reads the status
* register after monitoring the RDY/BSY line.Otherwise use a standard
* chip delay which is slightly more than tR (AC Timing) of the NAND
* device and read status register until you get a failure or success
*/
if (pdata->dev_ready) {
info->nand.dev_ready = omap_dev_ready;
info->nand.chip_delay = 0;
} else {
info->nand.waitfunc = omap_wait;
info->nand.chip_delay = 50;
}
switch (pdata->xfer_type) {
case NAND_OMAP_PREFETCH_POLLED:
info->nand.read_buf = omap_read_buf_pref;
info->nand.write_buf = omap_write_buf_pref;
break;
case NAND_OMAP_POLLED:
if (info->nand.options & NAND_BUSWIDTH_16) {
info->nand.read_buf = omap_read_buf16;
info->nand.write_buf = omap_write_buf16;
} else {
info->nand.read_buf = omap_read_buf8;
info->nand.write_buf = omap_write_buf8;
}
break;
case NAND_OMAP_PREFETCH_DMA:
err = omap_request_dma(OMAP24XX_DMA_GPMC, "NAND",
omap_nand_dma_cb, &info->comp, &info->dma_ch);
if (err < 0) {
info->dma_ch = -1;
dev_err(&pdev->dev, "DMA request failed!\n");
goto out_release_mem_region;
} else {
omap_set_dma_dest_burst_mode(info->dma_ch,
OMAP_DMA_DATA_BURST_16);
omap_set_dma_src_burst_mode(info->dma_ch,
OMAP_DMA_DATA_BURST_16);
info->nand.read_buf = omap_read_buf_dma_pref;
info->nand.write_buf = omap_write_buf_dma_pref;
}
break;
case NAND_OMAP_PREFETCH_IRQ:
err = request_irq(pdata->gpmc_irq,
omap_nand_irq, IRQF_SHARED, "gpmc-nand", info);
if (err) {
dev_err(&pdev->dev, "requesting irq(%d) error:%d",
pdata->gpmc_irq, err);
goto out_release_mem_region;
} else {
info->gpmc_irq = pdata->gpmc_irq;
info->nand.read_buf = omap_read_buf_irq_pref;
info->nand.write_buf = omap_write_buf_irq_pref;
}
break;
default:
dev_err(&pdev->dev,
"xfer_type(%d) not supported!\n", pdata->xfer_type);
err = -EINVAL;
goto out_release_mem_region;
}
info->nand.verify_buf = omap_verify_buf;
/* selsect the ecc type */
if (pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_DEFAULT)
info->nand.ecc.mode = NAND_ECC_SOFT;
else if ((pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_HW) ||
(pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_HW_ROMCODE)) {
info->nand.ecc.bytes = 3;
info->nand.ecc.size = 512;
info->nand.ecc.calculate = omap_calculate_ecc;
info->nand.ecc.hwctl = omap_enable_hwecc;
info->nand.ecc.correct = omap_correct_data;
info->nand.ecc.mode = NAND_ECC_HW;
}
/* DIP switches on some boards change between 8 and 16 bit
* bus widths for flash. Try the other width if the first try fails.
*/
if (nand_scan_ident(&info->mtd, 1, NULL)) {
info->nand.options ^= NAND_BUSWIDTH_16;
if (nand_scan_ident(&info->mtd, 1, NULL)) {
err = -ENXIO;
goto out_release_mem_region;
}
}
/* select ecc lyout */
if (info->nand.ecc.mode != NAND_ECC_SOFT) {
if (info->nand.options & NAND_BUSWIDTH_16)
offset = JFFS2_CLEAN_MARKER_OFFSET;
else {
offset = JFFS2_CLEAN_MARKER_OFFSET;
info->nand.badblock_pattern = &bb_descrip_flashbased;
}
if (info->mtd.oobsize == 64)
omap_oobinfo.eccbytes = info->nand.ecc.bytes *
2048/info->nand.ecc.size;
else
omap_oobinfo.eccbytes = info->nand.ecc.bytes;
if (pdata->ecc_opt == OMAP_ECC_HAMMING_CODE_HW_ROMCODE) {
omap_oobinfo.oobfree->offset =
offset + omap_oobinfo.eccbytes;
omap_oobinfo.oobfree->length = info->mtd.oobsize -
(offset + omap_oobinfo.eccbytes);
} else {
omap_oobinfo.oobfree->offset = offset;
omap_oobinfo.oobfree->length = info->mtd.oobsize -
offset - omap_oobinfo.eccbytes;
/*
offset is calculated considering the following :
1) 12 bytes ECC for 512 byte access and 24 bytes ECC for
256 byte access in OOB_64 can be supported
2)Ecc bytes lie to the end of OOB area.
3)Ecc layout must match with u-boot's ECC layout.
*/
offset = info->mtd.oobsize - MAX_HWECC_BYTES_OOB_64;
}
for (i = 0; i < omap_oobinfo.eccbytes; i++)
omap_oobinfo.eccpos[i] = i+offset;
info->nand.ecc.layout = &omap_oobinfo;
}
/* second phase scan */
if (nand_scan_tail(&info->mtd)) {
err = -ENXIO;
goto out_release_mem_region;
}
err = parse_mtd_partitions(&info->mtd, part_probes, &info->parts, 0);
if (err > 0)
mtd_device_register(&info->mtd, info->parts, err);
else if (pdata->parts)
mtd_device_register(&info->mtd, pdata->parts, pdata->nr_parts);
else
mtd_device_register(&info->mtd, NULL, 0);
platform_set_drvdata(pdev, &info->mtd);
return 0;
out_release_mem_region:
release_mem_region(info->phys_base, NAND_IO_SIZE);
out_free_info:
kfree(info);
return err;
}
static int omap_nand_remove(struct platform_device *pdev)
{
struct mtd_info *mtd = platform_get_drvdata(pdev);
struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
mtd);
platform_set_drvdata(pdev, NULL);
if (info->dma_ch != -1)
omap_free_dma(info->dma_ch);
if (info->gpmc_irq)
free_irq(info->gpmc_irq, info);
/* Release NAND device, its internal structures and partitions */
nand_release(&info->mtd);
iounmap(info->nand.IO_ADDR_R);
release_mem_region(info->phys_base, NAND_IO_SIZE);
kfree(&info->mtd);
return 0;
}
static struct platform_driver omap_nand_driver = {
.probe = omap_nand_probe,
.remove = omap_nand_remove,
.driver = {
.name = DRIVER_NAME,
.owner = THIS_MODULE,
},
};
static int __init omap_nand_init(void)
{
pr_info("%s driver initializing\n", DRIVER_NAME);
return platform_driver_register(&omap_nand_driver);
}
static void __exit omap_nand_exit(void)
{
platform_driver_unregister(&omap_nand_driver);
}
module_init(omap_nand_init);
module_exit(omap_nand_exit);
MODULE_ALIAS("platform:" DRIVER_NAME);
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Glue layer for NAND flash on TI OMAP boards");
Thanks & Regards
Keldy
Hi Renjith,
From which part of the code that you know that my kernel doesn't support the ECC BCH8?
i aware that i flash my MLO, u-boot.img, and kernel image (uImage) by using BCH8 in u-boot. It can boot until the kernel image, only when the system try to mount the file system, it come out UBI error: ubi_io_read: error -74 (ECC error).
if my kernel doesn't support BCH8, what ECC mode should i choose when flashing MLO, u-boot.img, kernel image, and file system image?
can i flash without select any ECC mode?
Thanks & Regards
Keldy
Keldy,
In the file drivers/mtd/nand/omap2.c the support BCH8 is not there. There is no function/code to handle BCH8. In those files that you've sent, only has 1-bit hamming code.
Even if the kernel doesn't support the BCH8, rest all binaries will boot except the file system. It matters only for the file system. You can also try using software implementation of the BCH8. In that case you should verify that the spare area offsets has to proper.
Hi.I am facing the same problem with the filesystem. I make a new board by coping the AM335x evm 15*15 board,using the am3354 and MT29F2G08AB.The environment is ti-sdk-am335x-evm-05.05.00.00. I follow the directer exactly to load the u_boot kernel and the ubi filesystem.but when booting from the nand. It shows the error:
VFS: Cannot open root device "ubi0:rootfs" or unknown-block(0,0)
[ 1.368408] Please append a correct "root=" boot option; here are the available partitions:
[ 1.377136] Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0)
The whole information is attached here:
Starting kernel ... Uncompressing Linux... done, booting the kernel. [ 0.000000] Linux version 3.2.0 (seven@ubuntu) (gcc version 4.5.3 20110311 (prerelease) (GCC) ) #1 Tue Jan 15 00:51:19 PST 2013 [ 0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c53c7d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache [ 0.000000] Machine: am335xevm [ 0.000000] Memory policy: ECC disabled, Data cache writeback [ 0.000000] AM335X ES1.0 (sgx neon ) [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 65024 [ 0.000000] Kernel command line: console=ttyO0,115200n8 root=ubi0:rootfs rw ubi.mtd=7,2048 noinitrd rootfstype=ubifs rootwait=1 ip=none [ 0.000000] PID hash table entries: 1024 (order: 0, 4096 bytes) [ 0.000000] Dentry cache hash table entries: 32768 (order: 5, 131072 bytes) [ 0.000000] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes) [ 0.000000] Memory: 256MB = 256MB total [ 0.000000] Memory: 253256k/253256k available, 8888k reserved, 0K highmem [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB) [ 0.000000] vmalloc : 0xd0800000 - 0xff000000 ( 744 MB) [ 0.000000] lowmem : 0xc0000000 - 0xd0000000 ( 256 MB) [ 0.000000] modules : 0xbf000000 - 0xc0000000 ( 16 MB) [ 0.000000] .text : 0xc0008000 - 0xc059d000 (5716 kB) [ 0.000000] .init : 0xc059d000 - 0xc05db000 ( 248 kB) [ 0.000000] .data : 0xc05dc000 - 0xc0644198 ( 417 kB) [ 0.000000] .bss : 0xc06441bc - 0xc0671024 ( 180 kB) [ 0.000000] NR_IRQS:396 [ 0.000000] IRQ: Found an INTC at 0xfa200000 (revision 5.0) with 128 interrupts [ 0.000000] Total of 128 interrupts on 1 active controller [ 0.000000] OMAP clockevent source: GPTIMER2 at 24000000 Hz [ 0.000000] OMAP clocksource: GPTIMER1 at 32768 Hz [ 0.000000] sched_clock: 32 bits at 32kHz, resolution 30517ns, wraps every 131071999ms [ 0.000000] Console: colour dummy device 80x30 [ 0.000152] Calibrating delay loop... 718.02 BogoMIPS (lpj=3590144) [ 0.058563] pid_max: default: 32768 minimum: 301 [ 0.058685] Security Framework initialized [ 0.058776] Mount-cache hash table entries: 512 [ 0.059173] CPU: Testing write buffer coherency: ok [ 0.079132] omap_hwmod: pruss: failed to hardreset [ 0.080230] print_constraints: dummy: [ 0.080596] NET: Registered protocol family 16 [ 0.082733] OMAP GPIO hardware version 0.1 [ 0.085296] omap_mux_init: Add partition: #1: core, flags: 0 [ 0.087493] omap_i2c.1: alias fck already exists [ 0.088378] omap2_mcspi.1: alias fck already exists [ 0.088653] omap2_mcspi.2: alias fck already exists [ 0.089416] edma.0: alias fck already exists [ 0.089447] edma.0: alias fck already exists [ 0.089447] edma.0: alias fck already exists [ 0.116058] bio: create slab <bio-0> at 0 [ 0.118286] SCSI subsystem initialized [ 0.119995] usbcore: registered new interface driver usbfs [ 0.120300] usbcore: registered new interface driver hub [ 0.120483] usbcore: registered new device driver usb [ 0.120635] musb-ti81xx musb-ti81xx: musb0, board_mode=0x13, plat_mode=0x3 [ 0.120941] musb-ti81xx musb-ti81xx: musb1, board_mode=0x13, plat_mode=0x1 [ 0.122039] omap_i2c omap_i2c.1: bus 1 rev2.4.0 at 100 kHz [ 0.123931] tps65910 1-002d: JTAGREVNUM 0x0 [ 0.126342] print_constraints: VRTC: [ 0.127777] print_constraints: VIO: at 1800 mV [ 0.130096] print_constraints: VDD1: 600 <--> 1500 mV at 1262 mV normal [ 0.132415] print_constraints: VDD2: 600 <--> 1500 mV at 1137 mV normal [ 0.133392] print_constraints: VDD3: 5000 mV [ 0.134796] print_constraints: VDIG1: at 1800 mV [ 0.136230] print_constraints: VDIG2: at 1800 mV [ 0.137664] print_constraints: VPLL: at 1800 mV [ 0.139068] print_constraints: VDAC: at 1800 mV [ 0.140502] print_constraints: VAUX1: at 1800 mV [ 0.141906] print_constraints: VAUX2: at 3300 mV [ 0.143341] print_constraints: VAUX33: at 3300 mV [ 0.144775] print_constraints: VMMC: at 3300 mV [ 0.145263] tps65910 1-002d: No interrupt support, no core IRQ [ 0.146484] Advanced Linux Sound Architecture Driver Version 1.0.24. [ 0.147613] Switching to clocksource gp timer [ 0.163024] musb-hdrc: version 6.0, ?dma?, otg (peripheral+host) [ 0.163208] musb-hdrc musb-hdrc.0: dma type: pio [ 0.163513] MUSB0 controller's USBSS revision = 4ea20800 [ 0.164062] musb-hdrc musb-hdrc.0: USB OTG mode controller at d083c000 using PIO, IRQ 18 [ 0.164245] musb-hdrc musb-hdrc.1: dma type: pio [ 0.164520] MUSB1 controller's USBSS revision = 4ea20800 [ 0.164642] musb-hdrc musb-hdrc.1: MUSB HDRC host driver [ 0.164733] musb-hdrc musb-hdrc.1: new USB bus registered, assigned bus number 1 [ 0.164855] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002 [ 0.164886] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [ 0.164886] usb usb1: Product: MUSB HDRC host driver [ 0.164916] usb usb1: Manufacturer: Linux 3.2.0 musb-hcd [ 0.164916] usb usb1: SerialNumber: musb-hdrc.1 [ 0.165679] hub 1-0:1.0: USB hub found [ 0.165710] hub 1-0:1.0: 1 port detected [ 0.166229] musb-hdrc musb-hdrc.1: USB Host mode controller at d083e800 using PIO, IRQ 19 [ 0.166656] NET: Registered protocol family 2 [ 0.166839] IP route cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.167144] TCP established hash table entries: 8192 (order: 4, 65536 bytes) [ 0.167297] TCP bind hash table entries: 8192 (order: 3, 32768 bytes) [ 0.167388] TCP: Hash tables configured (established 8192 bind 8192) [ 0.167419] TCP reno registered [ 0.167419] UDP hash table entries: 256 (order: 0, 4096 bytes) [ 0.167449] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes) [ 0.167633] NET: Registered protocol family 1 [ 0.167999] RPC: Registered named UNIX socket transport module. [ 0.167999] RPC: Registered udp transport module. [ 0.167999] RPC: Registered tcp transport module. [ 0.168029] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.168273] NetWinder Floating Point Emulator V0.97 (double precision) [ 0.180389] VFS: Disk quotas dquot_6.5.2 [ 0.180450] Dquot-cache hash table entries: 1024 (order 0, 4096 bytes) [ 0.180969] msgmni has been set to 494 [ 0.184173] alg: No test for stdrng (krng) [ 0.184844] io scheduler noop registered [ 0.184875] io scheduler deadline registered [ 0.184936] io scheduler cfq registered (default) [ 0.186126] Could not set LED4 to fully on [ 0.187988] omap_uart.0: ttyO0 at MMIO 0x44e09000 (irq = 72) is a OMAP UART0 [ 0.808868] console [ttyO0] enabled [ 0.813110] omap_uart.1: ttyO1 at MMIO 0x48022000 (irq = 73) is a OMAP UART1 [ 0.820953] omap_uart.2: ttyO2 at MMIO 0x48024000 (irq = 74) is a OMAP UART2 [ 0.828765] omap_uart.3: ttyO3 at MMIO 0x481a6000 (irq = 44) is a OMAP UART3 [ 0.836547] omap_uart.4: ttyO4 at MMIO 0x481a8000 (irq = 45) is a OMAP UART4 [ 0.844329] omap_uart.5: ttyO5 at MMIO 0x481aa000 (irq = 46) is a OMAP UART5 [ 0.861450] brd: module loaded [ 0.869537] loop: module loaded [ 0.872985] i2c-core: driver [tsl2550] using legacy suspend method [ 0.879455] i2c-core: driver [tsl2550] using legacy resume method [ 0.885894] at24 1-0051: 32768 byte 24c256 EEPROM, writable, 64 bytes/write [ 0.948211] No daughter card found [ 0.951812] at24 1-0050: 32768 byte 24c256 EEPROM, writable, 64 bytes/write [ 1.018249] AM335X: EVM Config read fail: -110 [ 1.024505] mtdoops: mtd device (mtddev=name/number) must be supplied [ 1.031707] omap2-nand driver initializing [ 1.036132] OneNAND driver initializing [ 1.041046] UBI error: ubi_init: UBI error: cannot initialize UBI, error -19 [ 1.049224] CAN device driver interface [ 1.053222] CAN bus driver for Bosch D_CAN controller 1.0 [ 1.059692] usbcore: registered new interface driver zd1201 [ 1.065673] usbcore: registered new interface driver cdc_ether [ 1.071960] usbcore: registered new interface driver cdc_eem [ 1.078002] usbcore: registered new interface driver dm9601 [ 1.083862] cdc_ncm: 04-Aug-2011 [ 1.087371] usbcore: registered new interface driver cdc_ncm [ 1.093292] Initializing USB Mass Storage driver... [ 1.098602] usbcore: registered new interface driver usb-storage [ 1.104858] USB Mass Storage support registered. [ 1.110168] mousedev: PS/2 mouse device common for all mice [ 1.117004] omap_rtc omap_rtc: rtc core: registered omap_rtc as rtc0 [ 1.123687] omap_rtc: already running [ 1.127655] i2c /dev entries driver [ 1.131713] Linux video capture interface: v2.00 [ 1.136871] usbcore: registered new interface driver uvcvideo [ 1.142883] USB Video Class driver (1.1.1) [ 1.149200] OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec [ 1.157714] cpuidle: using governor ladder [ 1.162506] cpuidle: using governor menu [ 1.167205] omap4_aes_mod_init: loading AM33X AES driver [ 1.172882] omap4-aes omap4-aes: AM33X AES hw accel rev: 3.02 [ 1.179412] omap4_aes_probe: probe() done [ 1.183807] omap4_sham_mod_init: loading AM33X SHA/MD5 driver [ 1.189971] omap4-sham omap4-sham: AM33X SHA/MD5 hw accel rev: 4.03 [ 1.201385] omap4_sham_probe: probe() done [ 1.208099] usbcore: registered new interface driver usbhid [ 1.213928] usbhid: USB HID core driver [ 1.218566] usbcore: registered new interface driver snd-usb-audio [ 1.226593] ALSA device list: [ 1.229736] No soundcards found. [ 1.233276] oprofile: hardware counters not available [ 1.238555] oprofile: using timer interrupt. [ 1.243011] nf_conntrack version 0.5.0 (3957 buckets, 15828 max) [ 1.249786] ip_tables: (C) 2000-2006 Netfilter Core Team [ 1.255462] TCP cubic registered [ 1.258850] NET: Registered protocol family 17 [ 1.263488] can: controller area network core (rev 20090105 abi 8) [ 1.270019] NET: Registered protocol family 29 [ 1.274658] can: raw protocol (rev 20090105) [ 1.279113] can: broadcast manager protocol (rev 20090105 t) [ 1.285064] Registering the dns_resolver key type [ 1.290039] VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3 [ 1.298034] ThumbEE CPU extension supported. [ 1.302551] mux: Failed to setup hwmod io irq -22 [ 1.308074] Power Management for AM33XX family [ 1.312927] Trying to load am335x-pm-firmware.bin (60 secs timeout) [ 1.319610] Copied the M3 firmware to UMEM [ 1.324493] sr_init: platform driver register failed [ 1.333099] clock: disabling unused clocks to save power [ 1.351867] omap_rtc omap_rtc: setting system clock to 2012-07-27 13:04:03 UTC (1343394243) [ 1.361022] VFS: Cannot open root device "ubi0:rootfs" or unknown-block(0,0) [ 1.368408] Please append a correct "root=" boot option; here are the available partitions: [ 1.377136] Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0) [ 1.385772] Backtrace: [ 1.388366] [<c0017978>] (dump_backtrace+0x0/0x110) from [<c0422358>] (dump_stack+0x18/0x1c) [ 1.397155] r6:cf93a000 r5:c05cc1fc r4:c06451c8 r3:c05fe6c8 [ 1.403076] [<c0422340>] (dump_stack+0x0/0x1c) from [<c04223c8>] (panic+0x6c/0x1a0) [ 1.411102] [<c042235c>] (panic+0x0/0x1a0) from [<c059dcb4>] (mount_block_root+0x184/0x228) [ 1.419799] r3:00000000 r2:00000000 r1:cf81df78 r0:c04fe660 [ 1.425720] r7:00008000 [ 1.428375] [<c059db30>] (mount_block_root+0x0/0x228) from [<c059dfd0>] (prepare_namespace+0xac/0x1d4) [ 1.438079] [<c059df24>] (prepare_namespace+0x0/0x1d4) from [<c059d90c>] (kernel_init+0x124/0x130) [ 1.447418] r5:c05da440 r4:c05da440 [ 1.451202] [<c059d7e8>] (kernel_init+0x0/0x130) from [<c0041390>] (do_exit+0x0/0x67c) [ 1.459442] r5:c059d7e8 r4:00000000
Tao,
If you go through the complete kernel logs you can see that your NAND is not detected by kernel. You need to fix this first to get any file system working.
[ 1.024505] mtdoops: mtd device (mtddev=name/number) must be supplied
[ 1.031707] omap2-nand driver initializing
[ 1.036132] OneNAND driver initializing
[ 1.041046] UBI error: ubi_init: UBI error: cannot initialize UBI, error -19
[ 1.049224] CAN device driver interface
[ 1.053222] CAN bus driver for Bosch D_CAN controller 1.0
[ 1.059692] usbcore: registered new interface driver zd1201
Hi,
i have the same problem with the root file system:
[ 4.214447] VFS: Cannot open root device "ubi0:rootfs" or unknown-block(0,0)
[ 4.221801] Please append a correct "root=" boot option; here are the available partitiions:
[ 4.272766] Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0)
My hardware is the am335x-evm Board, the environment ti-sdk-am335x-evm-05.06.00.00. I have written the prebuil-images (MLO, u-boot, uImage and the original arago file system as "ubi"- from the ti-sdk) via dfu to the NAND-flash. my Kernel v is 3.2.0. I thought with the prebuild images and file system must work...
My booting process as txt. -
I2C: ready DRAM: 512 MiB WARNING: Caches not enabled NAND: 256 MiB MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO) musb-hdrc: MHDRC RTL version 2.0 musb-hdrc: setup fifo_mode 4 musb-hdrc: 28/31 max ep, 16384/16384 memory USB Peripheral mode controller at 47401000 using PIO, IRQ 0 musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO) musb-hdrc: MHDRC RTL version 2.0 musb-hdrc: setup fifo_mode 4 musb-hdrc: 28/31 max ep, 16384/16384 memory USB Host mode controller at 47401800 using PIO, IRQ 0 Net: cpsw, usb_ether Hit any key to stop autoboot: 0 mmc_send_cmd : timeout: No status update Card did not respond to voltage select! Booting from nand ... ## Booting kernel from Legacy Image at 80007fc0 ... Image Name: Linux-3.2.0 Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 3162912 Bytes = 3 MiB Load Address: 80008000 Entry Point: 80008000 Verifying Checksum ... OK XIP Kernel Image ... OK OK Starting kernel ... Uncompressing Linux... done, booting the kernel. [ 0.000000] Linux version 3.2.0 (user@user) (gcc version 4.5.3 20110311 (pre3 [ 0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c53c7d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instructie [ 0.000000] Machine: am335xevm [ 0.000000] Memory policy: ECC disabled, Data cache writeback [ 0.000000] AM335X ES1.0 (sgx neon ) [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pa8 [ 0.000000] Kernel command line: console=ttyO0,115200n8 root=ubi0:rootfs rw e [ 0.000000] PID hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes) [ 0.000000] Memory: 512MB = 512MB total [ 0.000000] Memory: 513152k/513152k available, 11136k reserved, 0K highmem [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB) [ 0.000000] vmalloc : 0xe0800000 - 0xff000000 ( 488 MB) [ 0.000000] lowmem : 0xc0000000 - 0xe0000000 ( 512 MB) [ 0.000000] modules : 0xbf000000 - 0xc0000000 ( 16 MB) [ 0.000000] .text : 0xc0008000 - 0xc059d000 (5716 kB) [ 0.000000] .init : 0xc059d000 - 0xc05db000 ( 248 kB) [ 0.000000] .data : 0xc05dc000 - 0xc06441c8 ( 417 kB) [ 0.000000] .bss : 0xc06441ec - 0xc0671070 ( 180 kB) [ 0.000000] NR_IRQS:396 [ 0.000000] IRQ: Found an INTC at 0xfa200000 (revision 5.0) with 128 interrus [ 0.000000] Total of 128 interrupts on 1 active controller [ 0.000000] OMAP clockevent source: GPTIMER2 at 24000000 Hz [ 0.000000] OMAP clocksource: GPTIMER1 at 32768 Hz [ 0.000000] sched_clock: 32 bits at 32kHz, resolution 30517ns, wraps every 1s [ 0.000000] Console: colour dummy device 80x30 [ 0.000152] Calibrating delay loop... 718.02 BogoMIPS (lpj=3590144) [ 0.058532] pid_max: default: 32768 minimum: 301 [ 0.058685] Security Framework initialized [ 0.058776] Mount-cache hash table entries: 512 [ 0.059173] CPU: Testing write buffer coherency: ok [ 0.079711] omap_hwmod: pruss: failed to hardreset [ 0.080810] print_constraints: dummy: [ 0.081176] NET: Registered protocol family 16 [ 0.083282] OMAP GPIO hardware version 0.1 [ 0.085876] omap_mux_init: Add partition: #1: core, flags: 0 [ 0.087829] omap_i2c.1: alias fck already exists [ 0.088745] omap2_mcspi.1: alias fck already exists [ 0.088989] omap2_mcspi.2: alias fck already exists [ 0.089904] edma.0: alias fck already exists [ 0.089904] edma.0: alias fck already exists [ 0.089935] edma.0: alias fck already exists [ 0.116424] bio: create slab <bio-0> at 0 [ 0.118682] SCSI subsystem initialized [ 0.120269] usbcore: registered new interface driver usbfs [ 0.120574] usbcore: registered new interface driver hub [ 0.120758] usbcore: registered new device driver usb [ 0.120910] musb-ti81xx musb-ti81xx: musb0, board_mode=0x13, plat_mode=0x3 [ 0.121215] musb-ti81xx musb-ti81xx: musb1, board_mode=0x13, plat_mode=0x1 [ 0.122314] omap_i2c omap_i2c.1: bus 1 rev2.4.0 at 100 kHz [ 0.124176] tps65910 1-002d: JTAGREVNUM 0x0 [ 0.126556] print_constraints: VRTC: [ 0.128021] print_constraints: VIO: at 1800 mV [ 0.130310] print_constraints: VDD1: 600 <--> 1500 mV at 1262 mV normal [ 0.132629] print_constraints: VDD2: 600 <--> 1500 mV at 1137 mV normal [ 0.133636] print_constraints: VDD3: 5000 mV [ 0.135040] print_constraints: VDIG1: at 1800 mV [ 0.136474] print_constraints: VDIG2: at 1800 mV [ 0.137908] print_constraints: VPLL: at 1800 mV [ 0.139312] print_constraints: VDAC: at 1800 mV [ 0.140747] print_constraints: VAUX1: at 1800 mV [ 0.142181] print_constraints: VAUX2: at 3300 mV [ 0.143585] print_constraints: VAUX33: at 3300 mV [ 0.145019] print_constraints: VMMC: at 3300 mV [ 0.145507] tps65910 1-002d: No interrupt support, no core IRQ [ 0.146728] Advanced Linux Sound Architecture Driver Version 1.0.24. [ 0.147521] Switching to clocksource gp timer [ 0.162963] musb-hdrc: version 6.0, ?dma?, otg (peripheral+host) [ 0.163146] musb-hdrc musb-hdrc.0: dma type: pio [ 0.163452] MUSB0 controller's USBSS revision = 4ea20800 [ 0.164093] musb-hdrc musb-hdrc.0: USB OTG mode controller at e083c000 using8 [ 0.164276] musb-hdrc musb-hdrc.1: dma type: pio [ 0.164550] MUSB1 controller's USBSS revision = 4ea20800 [ 0.164733] musb-hdrc musb-hdrc.1: MUSB HDRC host driver [ 0.164825] musb-hdrc musb-hdrc.1: new USB bus registered, assigned bus numb1 [ 0.164947] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002 [ 0.164978] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber1 [ 0.164978] usb usb1: Product: MUSB HDRC host driver [ 0.165008] usb usb1: Manufacturer: Linux 3.2.0 musb-hcd [ 0.165008] usb usb1: SerialNumber: musb-hdrc.1 [ 0.165802] hub 1-0:1.0: USB hub found [ 0.165832] hub 1-0:1.0: 1 port detected [ 0.166381] musb-hdrc musb-hdrc.1: USB Host mode controller at e083e800 usin9 [ 0.166778] NET: Registered protocol family 2 [ 0.166992] IP route cache hash table entries: 4096 (order: 2, 16384 bytes) [ 0.167297] TCP established hash table entries: 16384 (order: 5, 131072 byte) [ 0.167694] TCP bind hash table entries: 16384 (order: 4, 65536 bytes) [ 0.167846] TCP: Hash tables configured (established 16384 bind 16384) [ 0.167877] TCP reno registered [ 0.167877] UDP hash table entries: 256 (order: 0, 4096 bytes) [ 0.167907] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes) [ 0.168090] NET: Registered protocol family 1 [ 0.168334] RPC: Registered named UNIX socket transport module. [ 0.168365] RPC: Registered udp transport module. [ 0.168365] RPC: Registered tcp transport module. [ 0.168395] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.168640] NetWinder Floating Point Emulator V0.97 (double precision) [ 0.189849] VFS: Disk quotas dquot_6.5.2 [ 0.189941] Dquot-cache hash table entries: 1024 (order 0, 4096 bytes) [ 0.190490] msgmni has been set to 1002 [ 0.193725] alg: No test for stdrng (krng) [ 0.194396] io scheduler noop registered [ 0.194427] io scheduler deadline registered [ 0.194488] io scheduler cfq registered (default) [ 0.198211] omap_uart.0: ttyO0 at MMIO 0x44e09000 (irq = 72) is a OMAP UART0 [ 0.815399] console [ttyO0] enabled [ 0.819671] omap_uart.1: ttyO1 at MMIO 0x48022000 (irq = 73) is a OMAP UART1 [ 0.827484] omap_uart.2: ttyO2 at MMIO 0x48024000 (irq = 74) is a OMAP UART2 [ 0.835266] omap_uart.3: ttyO3 at MMIO 0x481a6000 (irq = 44) is a OMAP UART3 [ 0.843078] omap_uart.4: ttyO4 at MMIO 0x481a8000 (irq = 45) is a OMAP UART4 [ 0.850830] omap_uart.5: ttyO5 at MMIO 0x481aa000 (irq = 46) is a OMAP UART5 [ 0.859100] omap4_rng omap4_rng: OMAP4 Random Number Generator ver. 2.00 [ 0.875366] brd: module loaded [ 0.883422] loop: module loaded [ 0.886871] i2c-core: driver [tsl2550] using legacy suspend method [ 0.893371] i2c-core: driver [tsl2550] using legacy resume method [ 0.899810] at24 1-0051: 32768 byte 24c256 EEPROM, writable, 64 bytes/write [ 0.913696] Detected a daughter card on AM335x EVM.. [ 0.918701] CPLD version: CPLD1.0F [ 0.922485] at24 1-0050: 32768 byte 24c256 EEPROM, writable, 64 bytes/write [ 0.937652] Board name: A33515BB [ 0.941040] Board version: 1.4A [ 0.944305] SKU: SKU#01 [ 0.947387] The board is general purpose EVM in profile 0 [ 0.954071] da8xx_lcdc.0: alias fck already exists [ 0.959594] da8xx_lcdc da8xx_lcdc.0: GLCD: Found TFC_S9700RTWV35TR_01B panel [ 0.983215] Console: switching to colour frame buffer device 100x30 [ 0.999938] omap-gpmc omap-gpmc: GPMC revision 6.0 [ 1.004943] Registering NAND on CS0 [ 1.009338] omap_i2c.2: alias fck already exists [ 1.014617] omap_i2c omap_i2c.2: bus 2 rev2.4.0 at 100 kHz [ 1.021118] tsl2550 2-0039: standard operating mode [ 1.026916] tsl2550 2-0039: support ver. 1.2 enabled [ 1.032745] davinci-mcasp.1: alias fck already exists [ 1.038574] omap_hsmmc.0: alias fck already exists [ 1.043975] omap_hsmmc.2: alias fck already exists [ 1.049560] Configure Bluetooth Enable pin... [ 1.055572] registered am33xx_sr device [ 1.059844] _regulator_get: 2-0018 supply Vdd not found, using dummy regulatr [ 1.067504] _regulator_get: 2-0018 supply Vdd_IO not found, using dummy regur [ 1.095916] lis3lv02d: 8 bits 3DLH sensor found [ 1.188537] input: ST LIS3LV02DL Accelerometer as /devices/platform/lis3lv020 [ 1.200317] mtdoops: mtd device (mtddev=name/number) must be supplied [ 1.207580] omap2-nand driver initializing [ 1.212219] ONFI flash detected [ 1.215606] ONFI param page 0 valid [ 1.219268] NAND device: Manufacturer ID: 0x2c, Chip ID: 0xda (Micron MT29F2) [ 1.227844] Creating 8 MTD partitions on "omap2-nand.0": [ 1.233428] 0x000000000000-0x000000020000 : "SPL" [ 1.239807] 0x000000020000-0x000000040000 : "SPL.backup1" [ 1.246673] 0x000000040000-0x000000060000 : "SPL.backup2" [ 1.253570] 0x000000060000-0x000000080000 : "SPL.backup3" [ 1.260467] 0x000000080000-0x000000260000 : "U-Boot" [ 1.267608] 0x000000260000-0x000000280000 : "U-Boot Env" [ 1.274475] 0x000000280000-0x000000780000 : "Kernel" [ 1.282989] 0x000000780000-0x000010000000 : "File System" [ 1.393188] OneNAND driver initializing [ 1.397918] UBI: attaching mtd7 to ubi0 [ 1.401977] UBI: physical eraseblock size: 131072 bytes (128 KiB) [ 1.408508] UBI: logical eraseblock size: 126976 bytes [ 1.414154] UBI: smallest flash I/O unit: 2048 [ 1.419067] UBI: VID header offset: 2048 (aligned 2048) [ 1.425323] UBI: data offset: 4096 [ 3.546783] UBI: max. sequence number: 2 [ 3.566650] UBI: attached mtd7 to ubi0 [ 3.570648] UBI: MTD device name: "File System" [ 3.576354] UBI: MTD device size: 248 MiB [ 3.581542] UBI: number of good PEBs: 1988 [ 3.586425] UBI: number of bad PEBs: 0 [ 3.591064] UBI: number of corrupted PEBs: 0 [ 3.595703] UBI: max. allowed volumes: 128 [ 3.600524] UBI: wear-leveling threshold: 4096 [ 3.605407] UBI: number of internal volumes: 1 [ 3.610046] UBI: number of user volumes: 1 [ 3.614685] UBI: available PEBs: 0 [ 3.619323] UBI: total number of reserved PEBs: 1988 [ 3.624481] UBI: number of PEBs reserved for bad PEB handling: 19 [ 3.630828] UBI: max/mean erase counter: 1/0 [ 3.635284] UBI: image sequence number: 1557601074 [ 3.640563] UBI: background thread "ubi_bgt0d" started, PID 603 [ 3.647338] CAN device driver interface [ 3.651367] CAN bus driver for Bosch D_CAN controller 1.0 [ 3.698211] davinci_mdio davinci_mdio.0: davinci mdio revision 1.6 [ 3.704681] davinci_mdio davinci_mdio.0: detected phy mask fffffffe [ 3.712127] davinci_mdio.0: probed [ 3.715698] davinci_mdio davinci_mdio.0: phy[0]: device 0:00, driver unknown [ 3.723419] usbcore: registered new interface driver zd1201 [ 3.729431] usbcore: registered new interface driver cdc_ether [ 3.735656] usbcore: registered new interface driver cdc_eem [ 3.741729] usbcore: registered new interface driver dm9601 [ 3.747589] cdc_ncm: 04-Aug-2011 [ 3.751129] usbcore: registered new interface driver cdc_ncm [ 3.757049] Initializing USB Mass Storage driver... [ 3.762359] usbcore: registered new interface driver usb-storage [ 3.768646] USB Mass Storage support registered. [ 3.773956] mousedev: PS/2 mouse device common for all mice [ 3.780700] input: matrix-keypad as /devices/platform/matrix-keypad/input/in1 [ 3.789703] input: ti-tsc as /devices/platform/omap/ti_tscadc/tsc/input/inpu2 [ 3.798278] omap_rtc am33xx-rtc: rtc core: registered am33xx-rtc as rtc0 [ 3.805297] am33xx-rtc: already running [ 3.809478] i2c /dev entries driver [ 3.813751] Linux video capture interface: v2.00 [ 3.818908] usbcore: registered new interface driver uvcvideo [ 3.824890] USB Video Class driver (1.1.1) [ 3.830078] lm75 2-0048: hwmon0: sensor 'tmp275' [ 3.837799] OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec [ 3.846405] cpuidle: using governor ladder [ 3.851226] cpuidle: using governor menu [ 3.929107] omap4_aes_mod_init: loading AM33X AES driver [ 3.934783] omap4-aes omap4-aes: AM33X AES hw accel rev: 3.02 [ 3.941345] omap4_aes_probe: probe() done [ 3.945770] omap4_sham_mod_init: loading AM33X SHA/MD5 driver [ 3.951934] omap4-sham omap4-sham: AM33X SHA/MD5 hw accel rev: 4.03 [ 3.963775] omap4_sham_probe: probe() done [ 3.970581] usbcore: registered new interface driver usbhid [ 3.976409] usbhid: USB HID core driver [ 3.981109] usbcore: registered new interface driver snd-usb-audio [ 3.992004] mmc1: card claims to support voltages below the defined range. T. [ 4.002105] _regulator_get: 2-001b supply IOVDD not found, using dummy regulr [ 4.009918] _regulator_get: 2-001b supply DVDD not found, using dummy regular [ 4.017608] _regulator_get: 2-001b supply AVDD not found, using dummy regular [ 4.025299] _regulator_get: 2-001b supply DRVDD not found, using dummy regulr [ 4.035827] asoc: tlv320aic3x-hifi <-> davinci-mcasp.1 mapping ok [ 4.043670] ALSA device list: [ 4.046783] #0: AM335X EVM [ 4.049804] oprofile: hardware counters not available [ 4.055084] oprofile: using timer interrupt. [ 4.059570] nf_conntrack version 0.5.0 (8018 buckets, 32072 max) [ 4.066406] ip_tables: (C) 2000-2006 Netfilter Core Team [ 4.072113] TCP cubic registered [ 4.075469] NET: Registered protocol family 17 [ 4.080139] can: controller area network core (rev 20090105 abi 8) [ 4.086669] NET: Registered protocol family 29 [ 4.091339] can: raw protocol (rev 20090105) [ 4.095764] can: broadcast manager protocol (rev 20090105 t) [ 4.101715] Registering the dns_resolver key type [ 4.106719] VFP support v0.3: implementor 41 architecture 3 part 30 variant 3 [ 4.114715] ThumbEE CPU extension supported. [ 4.119262] mux: Failed to setup hwmod io irq -22 [ 4.124786] Power Management for AM33XX family [ 4.129669] Trying to load am335x-pm-firmware.bin (60 secs timeout) [ 4.136322] Copied the M3 firmware to UMEM [ 4.140808] smartreflex smartreflex: am33xx_sr_probe: Zero NValue read from E [ 4.148681] smartreflex: probe of smartreflex failed with error -22 [ 4.155761] sr_init: platform driver register failed [ 4.165954] clock: disabling unused clocks to save power [ 4.184936] Detected MACID=0:18:31:8f:3a:fa [ 4.190521] cpsw: Detected MACID = 00:18:31:8f:3a:fb [ 4.197448] input: gpio-keys as /devices/platform/gpio-keys/input/input3 [ 4.205200] omap_rtc am33xx-rtc: setting system clock to 2000-01-01 00:02:29) [ 4.214447] VFS: Cannot open root device "ubi0:rootfs" or unknown-block(0,0) [ 4.221801] Please append a correct "root=" boot option; here are the availa: [ 4.230560] 1f00 128 mtdblock0 (driver?) [ 4.235839] 1f01 128 mtdblock1 (driver?) [ 4.241119] 1f02 128 mtdblock2 (driver?) [ 4.246398] 1f03 128 mtdblock3 (driver?) [ 4.251678] 1f04 1920 mtdblock4 (driver?) [ 4.256958] 1f05 128 mtdblock5 (driver?) [ 4.262237] 1f06 5120 mtdblock6 (driver?) [ 4.267486] 1f07 254464 mtdblock7 (driver?) [ 4.272766] Kernel panic - not syncing: VFS: Unable to mount root fs on unkn) [ 4.281402] Backtrace: [ 4.283996] [<c0017978>] (dump_backtrace+0x0/0x110) from [<c0421d64>] (dump_) [ 4.292785] r6:df923000 r5:c05cc224 r4:c0645208 r3:c05fe788 [ 4.298736] [<c0421d4c>] (dump_stack+0x0/0x1c) from [<c0421dd4>] (panic+0x6c) [ 4.306732] [<c0421d68>] (panic+0x0/0x1a0) from [<c059dcb4>] (mount_block_ro) [ 4.315429] r3:c05fe788 r2:00000000 r1:df82df78 r0:c04fdd30 [ 4.321380] r7:00008000 [ 4.324005] [<c059db30>] (mount_block_root+0x0/0x228) from [<c059dfd0>] (pre) [ 4.333740] [<c059df24>] (prepare_namespace+0x0/0x1d4) from [<c059d90c>] (ke) [ 4.343078] r5:c05da4d0 r4:c05da4d0 [ 4.346832] [<c059d7e8>] (kernel_init+0x0/0x130) from [<c0041724>] (do_exit+) [ 4.355102] r5:c059d7e8 r4:00000000
Sim,
Can you share your bootargs? Its not complete in the logs that you've shared.
Hi Renjith,
here the file
#define CONFIG_EXTRA_ENV_SETTINGS \
"loadaddr=0x80200000\0" \
"kloadaddr=0x80007fc0\0" \
"fdtaddr=0x80F80000\0" \
"rdaddr=0x81000000\0" \
"bootfile=uImage\0" \
"console=ttyO0,115200n8\0" \
"optargs=\0" \
"mmcdev=0\0" \
"mmcroot=/dev/mmcblk0p2 ro\0" \
"mmcrootfstype=ext3 rootwait\0" \
"nandroot=ubi0:rootfs rw ubi.mtd=7,2048\0" \
"nandrootfstype=ubifs rootwait=1\0" \
"nandsrcaddr=0x280000\0" \
"nandimgsize=0x500000\0" \
"mtdids=" MTDIDS_DEFAULT "\0" \
"mtdparts=" MTDPARTS_DEFAULT "\0" \
"rootpath=/export/rootfs\0" \
"nfsopts=nolock\0" \
"ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \
"ramrootfstype=ext2\0" \
"ip_method=none\0" \
"static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \
"::off\0" \
"bootargs_defaults=setenv bootargs " \
"console=${console} " \
"${optargs}\0" \
"mmcargs=run bootargs_defaults;" \
"setenv bootargs ${bootargs} " \
"root=${mmcroot} " \
"rootfstype=${mmcrootfstype} ip=${ip_method}\0" \
"nandargs=run bootargs_defaults;" \
"setenv bootargs ${bootargs} " \
"root=${nandroot} noinitrd " \
"rootfstype=${nandrootfstype} ip=${ip_method}\0" \
"spiroot=/dev/mtdblock4 rw\0" \
"spirootfstype=jffs2\0" \
"spisrcaddr=0x80000\0" \
"spiimgsize=0x362000\0" \
"spibusno=0\0" \
"ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \
"ramrootfstype=ext2\0" \
"spiargs=run bootargs_defaults;" \
"setenv bootargs ${bootargs} " \
"rootfstype=${spirootfstype} ip=${ip_method}\0" \
"netargs=run bootargs_defaults;" \
"setenv bootargs ${bootargs} " \
"root=/dev/nfs " \
"nfsroot=${serverip}:${rootpath},${nfsopts} rw " \
"ip=dhcp\0" \
"bootenv=uEnv.txt\0" \
"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
"importbootenv=echo Importing environment from mmc ...; " \
"env import -t $loadaddr $filesize\0" \
"ramargs=setenv bootargs console=${console} " \
"${optargs} " \
"root=${ramroot} " \
"rootfstype=${ramrootfstype}\0" \
"loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
"loaduimagefat=fatload mmc ${mmcdev} ${kloadaddr} ${bootfile}\0" \
"loaduimage=ext2load mmc ${mmcdev}:2 ${kloadaddr} /boot/${bootfile}\0" \
"mmcboot=echo Booting from mmc ...; " \
"run mmcargs; " \
"bootm ${kloadaddr}\0" \
"nandboot=echo Booting from nand ...; " \
"run nandargs; " \
"nand read.i ${kloadaddr} ${nandsrcaddr} ${nandimgsize}; " \
"bootm ${kloadaddr}\0" \
"spiboot=echo Booting from spi ...; " \
"run spiargs; " \
"sf probe ${spibusno}:0; " \
"sf read ${kloadaddr} ${spisrcaddr} ${spiimgsize}; " \
"bootm ${kloadaddr}\0" \
"netboot=echo Booting from network ...; " \
"setenv autoload no; " \
"dhcp; " \
"tftp ${kloadaddr} ${bootfile}; " \
"run netargs; " \
"bootm ${kloadaddr}\0" \
"ramboot=echo Booting from ramdisk ...; " \
"run ramargs; " \
"bootm ${loadaddr}\0" \
CONFIG_DFU_ALT
/* set to negative value for no autoboot */
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTCOMMAND \
"if mmc rescan ${mmcdev}; then " \
"echo SD/MMC found on device ${mmcdev};" \
"if run loadbootenv; then " \
"echo Loaded environment from ${bootenv};" \
"run importbootenv;" \
"fi;" \
"if test -n $uenvcmd; then " \
"echo Running uenvcmd ...;" \
"run uenvcmd;" \
"fi;" \
"if run loaduimagefat; then " \
"run mmcboot;" \
"elif run loaduimage; then " \
"run mmcboot;" \
"else " \
"echo Cound not find ${bootfile} ;" \
"fi;" \
"else " \
"run nandboot;" \
"fi;" \
#else
#define CONFIG_BOOTDELAY 1
#define CONFIG_BOOTCOMMAND \
"setenv autoload no; " \
"dhcp; " \
"if tftp 80000000 debrick.scr; then " \
"source 80000000; " \
"fi"
#endif
Thanks
Hi Rejith,
It happened a little misunderstanding.
I think you need this file:
Thanks
Simon
and now finally :) the file
baudrate=115200
bootargs=$(nand_args)
bootargs_defaults=setenv bootargs console=${console} ${optargs}
bootcmd=if mmc rescan ${mmcdev}; then echo SD/MMC found on device ${mmcdev};if run loadbootenv; then echo Loaded environm;
bootdelay=3
bootenv=uEnv.txt
bootfile=uImage
console=ttyO0,115200n8
dfu_alt_info=SPL part 0 1;SPL.backup1 part 0 2;SPL.backup2 part 0 3;SPL.backup3 part 0 4;u-boot part 0 5;kernel part 0 7;8
ethact=cpsw
ethaddr=00:18:31:8f:3a:fa
fdtaddr=0x80F80000
importbootenv=echo Importing environment from mmc ...; env import -t $loadaddr $filesize
ip_method=none
kloadaddr=0x80007fc0
loadaddr=0x80200000
loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}
loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz
loaduimage=ext2load mmc ${mmcdev}:2 ${kloadaddr} /boot/${bootfile}
loaduimagefat=fatload mmc ${mmcdev} ${kloadaddr} ${bootfile}
mmcargs=run bootargs_defaults;setenv bootargs ${bootargs} root=${mmcroot} rootfstype=${mmcrootfstype} ip=${ip_method}
mmcboot=echo Booting from mmc ...; run mmcargs; bootm ${kloadaddr}
mmcdev=0
mmcroot=/dev/mmcblk0p2 ro
mmcrootfstype=ext3 rootwait
mtdids=nand0=omap2-nand.0
mtdparts=mtdparts=omap2-nand.0:128k(SPL),128k(SPL.backup1),128k(SPL.backup2),128k(SPL.backup3),1920k(u-boot),128k(u-boot-)
nand_args=console=ttyS0,115200 root=/dev/mtdblock7 rootfstype=ubi rw mem=26M
nandargs=run bootargs_defaults;setenv bootargs ${bootargs} root=${nandroot} noinitrd rootfstype=${nandrootfstype} ip=${ip}
nandboot=echo Booting from nand ...; run nandargs; nand read.i ${kloadaddr} ${nandsrcaddr} ${nandimgsize}; bootm ${kloada}
nandimgsize=0x500000
nandroot=ubi0:rootfs rw ubi.mtd=7,2048
nandrootfstype=ubifs rootwait=1
nandsrcaddr=0x280000
netargs=run bootargs_defaults;setenv bootargs ${bootargs} root=/dev/nfs nfsroot=${serverip}:${rootpath},${nfsopts} rw ip=p
netboot=echo Booting from network ...; setenv autoload no; dhcp; tftp ${kloadaddr} ${bootfile}; run netargs; bootm ${kloa}
nfsopts=nolock
ramargs=setenv bootargs console=${console} ${optargs} root=${ramroot} rootfstype=${ramrootfstype}
ramboot=echo Booting from ramdisk ...; run ramargs; bootm ${loadaddr}
ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M
ramrootfstype=ext2
rdaddr=0x81000000
rootpath=/export/rootfs
spiargs=run bootargs_defaults;setenv bootargs ${bootargs} rootfstype=${spirootfstype} ip=${ip_method}
spiboot=echo Booting from spi ...; run spiargs; sf probe ${spibusno}:0; sf read ${kloadaddr} ${spisrcaddr} ${spiimgsize};}
spibusno=0
spiimgsize=0x362000
spiroot=/dev/mtdblock4 rw
spirootfstype=jffs2
spisrcaddr=0x80000
static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off
stderr=serial
stdin=serial
stdout=serial
usbnet_devaddr=00:18:31:8f:3a:fa
ver=U-Boot 2012.10 (Dec 16 2012 - 13:54:10)
Environment size: 3186/131068 bytes
Sim,
I think you should specify the bootargs related to ubifs like below
ubi.mtd=7 rootfstype=ubifs root=ubi0:rootfs rw
Hi Renjith,
the ubi image file has another name - am335x-evm-rootfs. That was the problem. I renamed it in the nandroot and now the board boot without any problems.
But when the board boot for a first time, at the end of the bootprocess come this message : UBIFS: start fixing up free space!
That takes over 4sec. of boot time. When i reboot than is no more fixing up of the free space, it comes: UBIFS: recovery completed.
Can i make the "fixing up of the free space" by the first boot faster??I think this process is no removable, but if i can make it faster would be happy :)
Thanks
Simon
Simon,
You try to reduce the partition size inorder to reduce the fixup space time. Or else you've to remove the -F flag while creating the UBI image.
Simon,
Could you please post your WORKING bootargs and boot log when you get a chance?
>> am335x-evm-rootfs. That was the problem. I renamed it in the nandroot
I am getting similar errors to your logs on an AM335x EVM but don't understand the syntax for above. Various permutations of "set 'nandroot ...'" in uboot are not working for me (though I seem them echoed in the bootlog). The same EVM boots fine with SD card and NFS. Just can't get the NAND UBIFS filesystem to work.
>>the environment ti-sdk-am335x-evm-05.06.00.00. I have written the prebuil-images (MLO, u-boot, uImage and the original arago file system as "ubi"- from the ti-sdk
Also for "ubi" do you mean the "arago-base-tisdk-image-am335x-evm.ubi" file that was in ti-sdk-am335x-evm-05.06.00.00? Or did you have to manipulate one of the "xxx-evm.tar.gz" files?
I am wondering if I should be using another file (much of the UBIFS Wiki entries mentione a ".img" file).
-Joe
Hi Joe,
Yes, i mean the "arago.....-am335x-evm.ubi" from ti-sdk-05.06.00.00. The problem was, that i could not get the name from the arago.ubi. To get the ubi file-system name you must boot from the SD-card, than make in Linux ubinfo -a.
Here the bootargs and the bootlog. I hope it will help you.
U-Boot# pri
baudrate=115200
bootargs_defaults=setenv bootargs console=${console} ${optargs}
bootcmd=if mmc rescan ${mmcdev}; then echo SD/MMC found on device ${mmcdev};if run loadbootenv; then echo Loaded environment from ${b;
bootdelay=3
bootenv=uEnv.txt
bootfile=uImage
console=ttyO0,115200n8
dfu_alt_info=SPL part 0 1;SPL.backup1 part 0 2;SPL.backup2 part 0 3;SPL.backup3 part 0 4;u-boot part 0 5;kernel part 0 7;rootfs part 8
ethact=cpsw
ethaddr=00:18:31:8f:3a:fa
fdtaddr=0x80F80000
importbootenv=echo Importing environment from mmc ...; env import -t $loadaddr $filesize
ip_method=none
kloadaddr=0x80007fc0
loadaddr=0x80200000
loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}
loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz
loaduimage=ext2load mmc ${mmcdev}:2 ${kloadaddr} /boot/${bootfile}
loaduimagefat=fatload mmc ${mmcdev} ${kloadaddr} ${bootfile}
mmcargs=run bootargs_defaults;setenv bootargs ${bootargs} root=${mmcroot} rootfstype=${mmcrootfstype} ip=${ip_method}
mmcboot=echo Booting from mmc ...; run mmcargs; bootm ${kloadaddr}
mmcdev=0
mmcroot=/dev/mmcblk0p2 ro
mmcrootfstype=ext3 rootwait
mtddevname=SPL
mtddevnum=0
mtdids=nand0=omap2-nand.0
mtdparts=mtdparts=omap2-nand.0:128k(SPL),128k(SPL.backup1),128k(SPL.backup2),128k(SPL.backup3),1920k(u-boot),128k(u-boot-env),5m(kern)
nandargs=run bootargs_defaults;setenv bootargs ${bootargs} root=${nandroot} noinitrd rootfstype=${nandrootfstype} ip=${ip_method}
nandboot=echo Booting from nand ...; run nandargs; nand read.i ${kloadaddr} ${nandsrcaddr} ${nandimgsize}; bootm ${kloadaddr}
nandimgsize=0x500000
nandroot=ubi0:am335x-evm-rootfs rw ubi.mtd=7,2048
nandrootfstype=ubifs rootwait=1
nandsilent=true
nandsrcaddr=0x280000
netargs=run bootargs_defaults;setenv bootargs ${bootargs} root=/dev/nfs nfsroot=${serverip}:${rootpath},${nfsopts} rw ip=dhcp
netboot=echo Booting from network ...; setenv autoload no; dhcp; tftp ${kloadaddr} ${bootfile}; run netargs; bootm ${kloadaddr}
nfsopts=nolock
partition=nand0,0
ramargs=setenv bootargs console=${console} ${optargs} root=${ramroot} rootfstype=${ramrootfstype}
ramboot=echo Booting from ramdisk ...; run ramargs; bootm ${loadaddr}
ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M
ramrootfstype=ext2
rdaddr=0x81000000
rootpath=/export/rootfs
spiargs=run bootargs_defaults;setenv bootargs ${bootargs} rootfstype=${spirootfstype} ip=${ip_method}
spiboot=echo Booting from spi ...; run spiargs; sf probe ${spibusno}:0; sf read ${kloadaddr} ${spisrcaddr} ${spiimgsize}; bootm ${klo}
spibusno=0
spiimgsize=0x362000
spiroot=/dev/mtdblock4 rw
spirootfstype=jffs2
spisrcaddr=0x80000
static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off
stderr=serial
stdin=serial
stdout=serial
I2C: ready
DRAM: 512 MiB
WARNING: Caches not enabled
NAND: 256 MiB
MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO)
musb-hdrc: MHDRC RTL version 2.0
musb-hdrc: setup fifo_mode 4
musb-hdrc: 28/31 max ep, 16384/16384 memory
USB Peripheral mode controller at 47401000 using PIO, IRQ 0
musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO)
musb-hdrc: MHDRC RTL version 2.0
musb-hdrc: setup fifo_mode 4
musb-hdrc: 28/31 max ep, 16384/16384 memory
USB Host mode controller at 47401800 using PIO, IRQ 0
Net: cpsw, usb_ether
Hit any key to stop autoboot: 0
mmc_send_cmd : timeout: No status update
Card did not respond to voltage select!
Booting from nand ...
## Booting kernel from Legacy Image at 80007fc0 ...
Image Name: Linux-3.2.0
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 3162912 Bytes = 3 MiB
Load Address: 80008000
Entry Point: 80008000
Verifying Checksum ... OK
XIP Kernel Image ... OK
OK
Starting kernel ...
Uncompressing Linux... done, booting the kernel.
[ 0.000000] Linux version 3.2.0 (user@user) (gcc version 4.5.3 20110311 (pre3
[ 0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c53c7d
[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instructie
[ 0.000000] Machine: am335xevm
[ 0.000000] Memory policy: ECC disabled, Data cache writeback
[ 0.000000] AM335X ES1.0 (sgx neon )
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pa8
[ 0.000000] Kernel command line: console=ttyO0,115200n8 root=ubi0:rootfs rw e
[ 0.000000] PID hash table entries: 2048 (order: 1, 8192 bytes)
[ 0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
[ 0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
[ 0.000000] Memory: 512MB = 512MB total
[ 0.000000] Memory: 513152k/513152k available, 11136k reserved, 0K highmem
[ 0.000000] Virtual kernel memory layout:
[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB)
[ 0.000000] fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
[ 0.000000] vmalloc : 0xe0800000 - 0xff000000 ( 488 MB)
[ 0.000000] lowmem : 0xc0000000 - 0xe0000000 ( 512 MB)
[ 0.000000] modules : 0xbf000000 - 0xc0000000 ( 16 MB)
[ 0.000000] .text : 0xc0008000 - 0xc059d000 (5716 kB)
[ 0.000000] .init : 0xc059d000 - 0xc05db000 ( 248 kB)
[ 0.000000] .data : 0xc05dc000 - 0xc06441c8 ( 417 kB)
[ 0.000000] .bss : 0xc06441ec - 0xc0671070 ( 180 kB)
[ 0.000000] NR_IRQS:396
[ 0.000000] IRQ: Found an INTC at 0xfa200000 (revision 5.0) with 128 interrus
[ 0.000000] Total of 128 interrupts on 1 active controller
[ 0.000000] OMAP clockevent source: GPTIMER2 at 24000000 Hz
[ 0.000000] OMAP clocksource: GPTIMER1 at 32768 Hz
[ 0.000000] sched_clock: 32 bits at 32kHz, resolution 30517ns, wraps every 1s
[ 0.000000] Console: colour dummy device 80x30
[ 0.000152] Calibrating delay loop... 718.02 BogoMIPS (lpj=3590144)
[ 0.058532] pid_max: default: 32768 minimum: 301
[ 0.058685] Security Framework initialized
[ 0.058776] Mount-cache hash table entries: 512
[ 0.059173] CPU: Testing write buffer coherency: ok
[ 0.079711] omap_hwmod: pruss: failed to hardreset
[ 0.080810] print_constraints: dummy:
[ 0.081176] NET: Registered protocol family 16
[ 0.083282] OMAP GPIO hardware version 0.1
[ 0.085876] omap_mux_init: Add partition: #1: core, flags: 0
[ 0.087829] omap_i2c.1: alias fck already exists
[ 0.088745] omap2_mcspi.1: alias fck already exists
[ 0.088989] omap2_mcspi.2: alias fck already exists
[ 0.089904] edma.0: alias fck already exists
[ 0.089904] edma.0: alias fck already exists
[ 0.089935] edma.0: alias fck already exists
[ 0.116424] bio: create slab <bio-0> at 0
[ 0.118682] SCSI subsystem initialized
[ 0.120269] usbcore: registered new interface driver usbfs
[ 0.120574] usbcore: registered new interface driver hub
[ 0.120758] usbcore: registered new device driver usb
[ 0.120910] musb-ti81xx musb-ti81xx: musb0, board_mode=0x13, plat_mode=0x3
[ 0.121215] musb-ti81xx musb-ti81xx: musb1, board_mode=0x13, plat_mode=0x1
[ 0.122314] omap_i2c omap_i2c.1: bus 1 rev2.4.0 at 100 kHz
[ 0.124176] tps65910 1-002d: JTAGREVNUM 0x0
[ 0.126556] print_constraints: VRTC:
[ 0.128021] print_constraints: VIO: at 1800 mV
[ 0.130310] print_constraints: VDD1: 600 <--> 1500 mV at 1262 mV normal
[ 0.132629] print_constraints: VDD2: 600 <--> 1500 mV at 1137 mV normal
[ 0.133636] print_constraints: VDD3: 5000 mV
[ 0.135040] print_constraints: VDIG1: at 1800 mV
[ 0.136474] print_constraints: VDIG2: at 1800 mV
[ 0.137908] print_constraints: VPLL: at 1800 mV
[ 0.139312] print_constraints: VDAC: at 1800 mV
[ 0.140747] print_constraints: VAUX1: at 1800 mV
[ 0.142181] print_constraints: VAUX2: at 3300 mV
[ 0.143585] print_constraints: VAUX33: at 3300 mV
[ 0.145019] print_constraints: VMMC: at 3300 mV
[ 0.145507] tps65910 1-002d: No interrupt support, no core IRQ
[ 0.146728] Advanced Linux Sound Architecture Driver Version 1.0.24.
[ 0.147521] Switching to clocksource gp timer
[ 0.162963] musb-hdrc: version 6.0, ?dma?, otg (peripheral+host)
[ 0.163146] musb-hdrc musb-hdrc.0: dma type: pio
[ 0.163452] MUSB0 controller's USBSS revision = 4ea20800
[ 0.164093] musb-hdrc musb-hdrc.0: USB OTG mode controller at e083c000 using8
[ 0.164276] musb-hdrc musb-hdrc.1: dma type: pio
[ 0.164550] MUSB1 controller's USBSS revision = 4ea20800
[ 0.164733] musb-hdrc musb-hdrc.1: MUSB HDRC host driver
[ 0.164825] musb-hdrc musb-hdrc.1: new USB bus registered, assigned bus numb1
[ 0.164947] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
[ 0.164978] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber1
[ 0.164978] usb usb1: Product: MUSB HDRC host driver
[ 0.165008] usb usb1: Manufacturer: Linux 3.2.0 musb-hcd
[ 0.165008] usb usb1: SerialNumber: musb-hdrc.1
[ 0.165802] hub 1-0:1.0: USB hub found
[ 0.165832] hub 1-0:1.0: 1 port detected
[ 0.166381] musb-hdrc musb-hdrc.1: USB Host mode controller at e083e800 usin9
[ 0.166778] NET: Registered protocol family 2
[ 0.166992] IP route cache hash table entries: 4096 (order: 2, 16384 bytes)
[ 0.167297] TCP established hash table entries: 16384 (order: 5, 131072 byte)
[ 0.167694] TCP bind hash table entries: 16384 (order: 4, 65536 bytes)
[ 0.167846] TCP: Hash tables configured (established 16384 bind 16384)
[ 0.167877] TCP reno registered
[ 0.167877] UDP hash table entries: 256 (order: 0, 4096 bytes)
[ 0.167907] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
[ 0.168090] NET: Registered protocol family 1
[ 0.168334] RPC: Registered named UNIX socket transport module.
[ 0.168365] RPC: Registered udp transport module.
[ 0.168365] RPC: Registered tcp transport module.
[ 0.168395] RPC: Registered tcp NFSv4.1 backchannel transport module.
[ 0.168640] NetWinder Floating Point Emulator V0.97 (double precision)
[ 0.189849] VFS: Disk quotas dquot_6.5.2
[ 0.189941] Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
[ 0.190490] msgmni has been set to 1002
[ 0.193725] alg: No test for stdrng (krng)
[ 0.194396] io scheduler noop registered
[ 0.194427] io scheduler deadline registered
[ 0.194488] io scheduler cfq registered (default)
[ 0.198211] omap_uart.0: ttyO0 at MMIO 0x44e09000 (irq = 72) is a OMAP UART0
[ 0.815399] console [ttyO0] enabled
[ 0.819671] omap_uart.1: ttyO1 at MMIO 0x48022000 (irq = 73) is a OMAP UART1
[ 0.827484] omap_uart.2: ttyO2 at MMIO 0x48024000 (irq = 74) is a OMAP UART2
[ 0.835266] omap_uart.3: ttyO3 at MMIO 0x481a6000 (irq = 44) is a OMAP UART3
[ 0.843078] omap_uart.4: ttyO4 at MMIO 0x481a8000 (irq = 45) is a OMAP UART4
[ 0.850830] omap_uart.5: ttyO5 at MMIO 0x481aa000 (irq = 46) is a OMAP UART5
[ 0.859100] omap4_rng omap4_rng: OMAP4 Random Number Generator ver. 2.00
[ 0.875366] brd: module loaded
[ 0.883422] loop: module loaded
[ 0.886871] i2c-core: driver [tsl2550] using legacy suspend method
[ 0.893371] i2c-core: driver [tsl2550] using legacy resume method
[ 0.899810] at24 1-0051: 32768 byte 24c256 EEPROM, writable, 64 bytes/write
[ 0.913696] Detected a daughter card on AM335x EVM..
[ 0.918701] CPLD version: CPLD1.0F
[ 0.922485] at24 1-0050: 32768 byte 24c256 EEPROM, writable, 64 bytes/write
[ 0.937652] Board name: A33515BB
[ 0.941040] Board version: 1.4A
[ 0.944305] SKU: SKU#01
[ 0.947387] The board is general purpose EVM in profile 0
[ 0.954071] da8xx_lcdc.0: alias fck already exists
[ 0.959594] da8xx_lcdc da8xx_lcdc.0: GLCD: Found TFC_S9700RTWV35TR_01B panel
[ 0.983215] Console: switching to colour frame buffer device 100x30
[ 0.999938] omap-gpmc omap-gpmc: GPMC revision 6.0
[ 1.004943] Registering NAND on CS0
[ 1.009338] omap_i2c.2: alias fck already exists
[ 1.014617] omap_i2c omap_i2c.2: bus 2 rev2.4.0 at 100 kHz
[ 1.021118] tsl2550 2-0039: standard operating mode
[ 1.026916] tsl2550 2-0039: support ver. 1.2 enabled
[ 1.032745] davinci-mcasp.1: alias fck already exists
[ 1.038574] omap_hsmmc.0: alias fck already exists
[ 1.043975] omap_hsmmc.2: alias fck already exists
[ 1.049560] Configure Bluetooth Enable pin...
[ 1.055572] registered am33xx_sr device
[ 1.059844] _regulator_get: 2-0018 supply Vdd not found, using dummy regulatr
[ 1.067504] _regulator_get: 2-0018 supply Vdd_IO not found, using dummy regur
[ 1.095916] lis3lv02d: 8 bits 3DLH sensor found
[ 1.188537] input: ST LIS3LV02DL Accelerometer as /devices/platform/lis3lv020
[ 1.200317] mtdoops: mtd device (mtddev=name/number) must be supplied
[ 1.207580] omap2-nand driver initializing
[ 1.212219] ONFI flash detected
[ 1.215606] ONFI param page 0 valid
[ 1.219268] NAND device: Manufacturer ID: 0x2c, Chip ID: 0xda (Micron MT29F2)
[ 1.227844] Creating 8 MTD partitions on "omap2-nand.0":
[ 1.233428] 0x000000000000-0x000000020000 : "SPL"
[ 1.239807] 0x000000020000-0x000000040000 : "SPL.backup1"
[ 1.246673] 0x000000040000-0x000000060000 : "SPL.backup2"
[ 1.253570] 0x000000060000-0x000000080000 : "SPL.backup3"
[ 1.260467] 0x000000080000-0x000000260000 : "U-Boot"
[ 1.267608] 0x000000260000-0x000000280000 : "U-Boot Env"
[ 1.274475] 0x000000280000-0x000000780000 : "Kernel"
[ 1.282989] 0x000000780000-0x000010000000 : "File System"
[ 1.393188] OneNAND driver initializing
[ 1.397918] UBI: attaching mtd7 to ubi0
[ 1.401977] UBI: physical eraseblock size: 131072 bytes (128 KiB)
[ 1.408508] UBI: logical eraseblock size: 126976 bytes
[ 1.414154] UBI: smallest flash I/O unit: 2048
[ 1.419067] UBI: VID header offset: 2048 (aligned 2048)
[ 1.425323] UBI: data offset: 4096
[ 3.546783] UBI: max. sequence number: 2
[ 3.566650] UBI: attached mtd7 to ubi0
[ 3.570648] UBI: MTD device name: "File System"
[ 3.576354] UBI: MTD device size: 248 MiB
[ 3.581542] UBI: number of good PEBs: 1988
[ 3.586425] UBI: number of bad PEBs: 0
[ 3.591064] UBI: number of corrupted PEBs: 0
[ 3.595703] UBI: max. allowed volumes: 128
[ 3.600524] UBI: wear-leveling threshold: 4096
[ 3.605407] UBI: number of internal volumes: 1
[ 3.610046] UBI: number of user volumes: 1
[ 3.614685] UBI: available PEBs: 0
[ 3.619323] UBI: total number of reserved PEBs: 1988
[ 3.624481] UBI: number of PEBs reserved for bad PEB handling: 19
[ 3.630828] UBI: max/mean erase counter: 1/0
[ 3.635284] UBI: image sequence number: 1557601074
[ 3.640563] UBI: background thread "ubi_bgt0d" started, PID 603
[ 3.647338] CAN device driver interface
[ 3.651367] CAN bus driver for Bosch D_CAN controller 1.0
[ 3.698211] davinci_mdio davinci_mdio.0: davinci mdio revision 1.6
[ 3.704681] davinci_mdio davinci_mdio.0: detected phy mask fffffffe
[ 3.712127] davinci_mdio.0: probed
[ 3.715698] davinci_mdio davinci_mdio.0: phy[0]: device 0:00, driver unknown
[ 3.723419] usbcore: registered new interface driver zd1201
[ 3.729431] usbcore: registered new interface driver cdc_ether
[ 3.735656] usbcore: registered new interface driver cdc_eem
[ 3.741729] usbcore: registered new interface driver dm9601
[ 3.747589] cdc_ncm: 04-Aug-2011
[ 3.751129] usbcore: registered new interface driver cdc_ncm
[ 3.757049] Initializing USB Mass Storage driver...
[ 3.762359] usbcore: registered new interface driver usb-storage
[ 3.768646] USB Mass Storage support registered.
[ 3.773956] mousedev: PS/2 mouse device common for all mice
[ 3.780700] input: matrix-keypad as /devices/platform/matrix-keypad/input/in1
[ 3.789703] input: ti-tsc as /devices/platform/omap/ti_tscadc/tsc/input/inpu2
[ 3.798278] omap_rtc am33xx-rtc: rtc core: registered am33xx-rtc as rtc0
[ 3.805297] am33xx-rtc: already running
[ 3.809478] i2c /dev entries driver
[ 3.813751] Linux video capture interface: v2.00
[ 3.818908] usbcore: registered new interface driver uvcvideo
[ 3.824890] USB Video Class driver (1.1.1)
[ 3.830078] lm75 2-0048: hwmon0: sensor 'tmp275'
[ 3.837799] OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec
[ 3.846405] cpuidle: using governor ladder
[ 3.851226] cpuidle: using governor menu
[ 3.929107] omap4_aes_mod_init: loading AM33X AES driver
[ 3.934783] omap4-aes omap4-aes: AM33X AES hw accel rev: 3.02
[ 3.941345] omap4_aes_probe: probe() done
[ 3.945770] omap4_sham_mod_init: loading AM33X SHA/MD5 driver
[ 3.951934] omap4-sham omap4-sham: AM33X SHA/MD5 hw accel rev: 4.03
[ 3.963775] omap4_sham_probe: probe() done
[ 3.970581] usbcore: registered new interface driver usbhid
[ 3.976409] usbhid: USB HID core driver
[ 3.981109] usbcore: registered new interface driver snd-usb-audio
[ 3.992004] mmc1: card claims to support voltages below the defined range. T.
[ 4.002105] _regulator_get: 2-001b supply IOVDD not found, using dummy regulr
[ 4.009918] _regulator_get: 2-001b supply DVDD not found, using dummy regular
[ 4.017608] _regulator_get: 2-001b supply AVDD not found, using dummy regular
[ 4.025299] _regulator_get: 2-001b supply DRVDD not found, using dummy regulr
[ 4.035827] asoc: tlv320aic3x-hifi <-> davinci-mcasp.1 mapping ok
[ 4.043670] ALSA device list:
[ 4.046783] #0: AM335X EVM
[ 4.049804] oprofile: hardware counters not available
[ 4.055084] oprofile: using timer interrupt.
[ 4.059570] nf_conntrack version 0.5.0 (8018 buckets, 32072 max)
[ 4.066406] ip_tables: (C) 2000-2006 Netfilter Core Team
[ 4.072113] TCP cubic registered
[ 4.075469] NET: Registered protocol family 17
[ 4.080139] can: controller area network core (rev 20090105 abi 8)
[ 4.086669] NET: Registered protocol family 29
[ 4.091339] can: raw protocol (rev 20090105)
[ 4.095764] can: broadcast manager protocol (rev 20090105 t)
[ 4.101715] Registering the dns_resolver key type
[ 4.106719] VFP support v0.3: implementor 41 architecture 3 part 30 variant 3
[ 4.114715] ThumbEE CPU extension supported.
[ 4.119262] mux: Failed to setup hwmod io irq -22
[ 4.124786] Power Management for AM33XX family
[ 4.129669] Trying to load am335x-pm-firmware.bin (60 secs timeout)
[ 4.136322] Copied the M3 firmware to UMEM
[ 4.140808] smartreflex smartreflex: am33xx_sr_probe: Zero NValue read from E
[ 4.148681] smartreflex: probe of smartreflex failed with error -22
[ 4.155761] sr_init: platform driver register failed
[ 4.165954] clock: disabling unused clocks to save power
[ 4.184936] Detected MACID=0:18:31:8f:3a:fa
[ 4.190521] cpsw: Detected MACID = 00:18:31:8f:3a:fb
[ 4.197448] input: gpio-keys as /devices/platform/gpio-keys/input/input3
[ 4.205200] omap_rtc am33xx-rtc: setting system clock to 2000-01-01 00:02:29)
[ 4.214447] VFS: Cannot open root device "ubi0:rootfs" or unknown-block(0,0)
[ 4.221801] Please append a correct "root=" boot option; here are the availa:
[ 4.230560] 1f00 128 mtdblock0 (driver?)
[ 4.235839] 1f01 128 mtdblock1 (driver?)
[ 4.241119] 1f02 128 mtdblock2 (driver?)
[ 4.246398] 1f03 128 mtdblock3 (driver?)
[ 4.251678] 1f04 1920 mtdblock4 (driver?)
[ 4.256958] 1f05 128 mtdblock5 (driver?)
[ 4.262237] 1f06 5120 mtdblock6 (driver?)
[ 4.267486] 1f07 254464 mtdblock7 (driver?)
[ 4.272766] Kernel panic - not syncing: VFS: Unable to mount root fs on unkn)
[ 4.281402] Backtrace:
[ 4.283996] [<c0017978>] (dump_backtrace+0x0/0x110) from [<c0421d64>] (dump_)
[ 4.292785] r6:df923000 r5:c05cc224 r4:c0645208 r3:c05fe788
[ 4.298736] [<c0421d4c>] (dump_stack+0x0/0x1c) from [<c0421dd4>] (panic+0x6c)
[ 4.306732] [<c0421d68>] (panic+0x0/0x1a0) from [<c059dcb4>] (mount_block_ro)
[ 4.315429] r3:c05fe788 r2:00000000 r1:df82df78 r0:c04fdd30
[ 4.321380] r7:00008000
[ 4.324005] [<c059db30>] (mount_block_root+0x0/0x228) from [<c059dfd0>] (pre)
[ 4.333740] [<c059df24>] (prepare_namespace+0x0/0x1d4) from [<c059d90c>] (ke)
[ 4.343078] r5:c05da4d0 r4:c05da4d0
[ 4.346832] [<c059d7e8>] (kernel_init+0x0/0x130) from [<c0041724>] (do_exit+)
[ 4.355102] r5:c059d7e8 r4:00000000
Joe,
i forgot to attach the working bootlog.
U-Boot SPL 2012.10 (Mar 21 2013 - 16:54:22)
U-Boot 2012.10 (Mar 21 2013 - 16:54:22)
I2C: ready
DRAM: 512 MiB
WARNING: Caches not enabled
NAND: 256 MiB
MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
Using default environment
musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn)
musb-hdrc: MHDRC RTL version 2.0
musb-hdrc: setup fifo_mode 4
musb-hdrc: 28/31 max ep, 16384/16384 memory
USB Peripheral mode controller at 47401000 using PIO, IRQ 0
musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn)
musb-hdrc: MHDRC RTL version 2.0
musb-hdrc: setup fifo_mode 4
musb-hdrc: 28/31 max ep, 16384/16384 memory
USB Host mode controller at 47401800 using PIO, IRQ 0
Net: Net Initialization Skipped
No ethernet found.
Hit any key to stop autoboot: 0
syntax error
Booting from nand ...
NAND read: device 0 offset 0x280000, size 0x500000
5242880 bytes read: OK
## Booting kernel from Legacy Image at 80007fc0 ...
Image Name: Linux-3.2.0
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 3162912 Bytes = 3 MiB
Load Address: 80008000
Entry Point: 80008000
XIP Kernel Image ... OK
OK
Starting kernel ...
Uncompressing Linux... done, booting the kernel.
[ 0.000000] Linux version 3.2.0 (user@user) (gcc version 4.5.3 20110311 (prerelease) (GCC) ) #1 Tue Mar 5 18:09:09 C3
[ 0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c53c7d
[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[ 0.000000] Machine: am335xevm
[ 0.000000] Memory policy: ECC disabled, Data cache writeback
[ 0.000000] AM335X ES1.0 (sgx neon )
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 130048
[ 0.000000] Kernel command line: console=ttyO0,115200n8 root=ubi0:am335x-evm-rootfs rw ubi.mtd=7,2048 noinitrd rootfe
[ 0.000000] PID hash table entries: 2048 (order: 1, 8192 bytes)
[ 0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
[ 0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
[ 0.000000] Memory: 512MB = 512MB total
[ 0.000000] Memory: 513152k/513152k available, 11136k reserved, 0K highmem
[ 0.000000] Virtual kernel memory layout:
[ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB)
[ 0.000000] fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
[ 0.000000] vmalloc : 0xe0800000 - 0xff000000 ( 488 MB)
[ 0.000000] lowmem : 0xc0000000 - 0xe0000000 ( 512 MB)
[ 0.000000] modules : 0xbf000000 - 0xc0000000 ( 16 MB)
[ 0.000000] .text : 0xc0008000 - 0xc059d000 (5716 kB)
[ 0.000000] .init : 0xc059d000 - 0xc05db000 ( 248 kB)
[ 0.000000] .data : 0xc05dc000 - 0xc06441c8 ( 417 kB)
[ 0.000000] .bss : 0xc06441ec - 0xc0671070 ( 180 kB)
[ 0.000000] NR_IRQS:396
[ 0.000000] IRQ: Found an INTC at 0xfa200000 (revision 5.0) with 128 interrupts
[ 0.000000] Total of 128 interrupts on 1 active controller
[ 0.000000] OMAP clockevent source: GPTIMER2 at 24000000 Hz
[ 0.000000] OMAP clocksource: GPTIMER1 at 32768 Hz
[ 0.000000] sched_clock: 32 bits at 32kHz, resolution 30517ns, wraps every 131071999ms
[ 0.000000] Console: colour dummy device 80x30
[ 0.000152] Calibrating delay loop... 718.02 BogoMIPS (lpj=3590144)
[ 0.058563] pid_max: default: 32768 minimum: 301
[ 0.058685] Security Framework initialized
[ 0.058776] Mount-cache hash table entries: 512
[ 0.059173] CPU: Testing write buffer coherency: ok
[ 0.079711] omap_hwmod: pruss: failed to hardreset
[ 0.080841] print_constraints: dummy:
[ 0.081207] NET: Registered protocol family 16
[ 0.083343] OMAP GPIO hardware version 0.1
[ 0.085906] omap_mux_init: Add partition: #1: core, flags: 0
[ 0.087860] omap_i2c.1: alias fck already exists
[ 0.088806] omap2_mcspi.1: alias fck already exists
[ 0.089019] omap2_mcspi.2: alias fck already exists
[ 0.089965] edma.0: alias fck already exists
[ 0.089965] edma.0: alias fck already exists
[ 0.089996] edma.0: alias fck already exists
[ 0.116455] bio: create slab <bio-0> at 0
[ 0.118713] SCSI subsystem initialized
[ 0.120300] usbcore: registered new interface driver usbfs
[ 0.120605] usbcore: registered new interface driver hub
[ 0.120788] usbcore: registered new device driver usb
[ 0.120941] musb-ti81xx musb-ti81xx: musb0, board_mode=0x13, plat_mode=0x3
[ 0.121215] musb-ti81xx musb-ti81xx: musb1, board_mode=0x13, plat_mode=0x1
[ 0.122344] omap_i2c omap_i2c.1: bus 1 rev2.4.0 at 100 kHz
[ 0.124176] tps65910 1-002d: JTAGREVNUM 0x0
[ 0.126586] print_constraints: VRTC:
[ 0.128021] print_constraints: VIO: at 1800 mV
[ 0.130340] print_constraints: VDD1: 600 <--> 1500 mV at 1262 mV normal
[ 0.132629] print_constraints: VDD2: 600 <--> 1500 mV at 1137 mV normal
[ 0.133636] print_constraints: VDD3: 5000 mV
[ 0.135040] print_constraints: VDIG1: at 1800 mV
[ 0.136474] print_constraints: VDIG2: at 1800 mV
[ 0.137878] print_constraints: VPLL: at 1800 mV
[ 0.139312] print_constraints: VDAC: at 1800 mV
[ 0.140747] print_constraints: VAUX1: at 1800 mV
[ 0.142181] print_constraints: VAUX2: at 3300 mV
[ 0.143585] print_constraints: VAUX33: at 3300 mV
[ 0.145019] print_constraints: VMMC: at 3300 mV
[ 0.145538] tps65910 1-002d: No interrupt support, no core IRQ
[ 0.146759] Advanced Linux Sound Architecture Driver Version 1.0.24.
[ 0.147521] Switching to clocksource gp timer
[ 0.162933] musb-hdrc: version 6.0, ?dma?, otg (peripheral+host)
[ 0.163116] musb-hdrc musb-hdrc.0: dma type: pio
[ 0.163452] MUSB0 controller's USBSS revision = 4ea20800
[ 0.164093] musb-hdrc musb-hdrc.0: USB OTG mode controller at e083c000 using PIO, IRQ 18
[ 0.164245] musb-hdrc musb-hdrc.1: dma type: pio
[ 0.164550] MUSB1 controller's USBSS revision = 4ea20800
[ 0.164733] musb-hdrc musb-hdrc.1: MUSB HDRC host driver
[ 0.164794] musb-hdrc musb-hdrc.1: new USB bus registered, assigned bus number 1
[ 0.164947] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
[ 0.164947] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[ 0.164978] usb usb1: Product: MUSB HDRC host driver
[ 0.164978] usb usb1: Manufacturer: Linux 3.2.0 musb-hcd
[ 0.164978] usb usb1: SerialNumber: musb-hdrc.1
[ 0.165771] hub 1-0:1.0: USB hub found
[ 0.165802] hub 1-0:1.0: 1 port detected
[ 0.166351] musb-hdrc musb-hdrc.1: USB Host mode controller at e083e800 using PIO, IRQ 19
[ 0.166748] NET: Registered protocol family 2
[ 0.166931] IP route cache hash table entries: 4096 (order: 2, 16384 bytes)
[ 0.167266] TCP established hash table entries: 16384 (order: 5, 131072 bytes)
[ 0.167633] TCP bind hash table entries: 16384 (order: 4, 65536 bytes)
[ 0.167816] TCP: Hash tables configured (established 16384 bind 16384)
[ 0.167816] TCP reno registered
[ 0.167846] UDP hash table entries: 256 (order: 0, 4096 bytes)
[ 0.167877] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
[ 0.168060] NET: Registered protocol family 1
[ 0.168304] RPC: Registered named UNIX socket transport module.
[ 0.168334] RPC: Registered udp transport module.
[ 0.168334] RPC: Registered tcp transport module.
[ 0.168334] RPC: Registered tcp NFSv4.1 backchannel transport module.
[ 0.168579] NetWinder Floating Point Emulator V0.97 (double precision)
[ 0.189849] VFS: Disk quotas dquot_6.5.2
[ 0.189910] Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
[ 0.190490] msgmni has been set to 1002
[ 0.193664] alg: No test for stdrng (krng)
[ 0.194366] io scheduler noop registered
[ 0.194366] io scheduler deadline registered
[ 0.194427] io scheduler cfq registered (default)
[ 0.198150] omap_uart.0: ttyO0 at MMIO 0x44e09000 (irq = 72) is a OMAP UART0
[ 0.816345] console [ttyO0] enabled
[ 0.820617] omap_uart.1: ttyO1 at MMIO 0x48022000 (irq = 73) is a OMAP UART1
[ 0.828491] omap_uart.2: ttyO2 at MMIO 0x48024000 (irq = 74) is a OMAP UART2
[ 0.836242] omap_uart.3: ttyO3 at MMIO 0x481a6000 (irq = 44) is a OMAP UART3
[ 0.844024] omap_uart.4: ttyO4 at MMIO 0x481a8000 (irq = 45) is a OMAP UART4
[ 0.851806] omap_uart.5: ttyO5 at MMIO 0x481aa000 (irq = 46) is a OMAP UART5
[ 0.860046] omap4_rng omap4_rng: OMAP4 Random Number Generator ver. 2.00
[ 0.876312] brd: module loaded
[ 0.884368] loop: module loaded
[ 0.887817] i2c-core: driver [tsl2550] using legacy suspend method
[ 0.894317] i2c-core: driver [tsl2550] using legacy resume method
[ 0.900756] at24 1-0051: 32768 byte 24c256 EEPROM, writable, 64 bytes/write
[ 0.914672] Detected a daughter card on AM335x EVM..
[ 0.919708] CPLD version: CPLD1.0F
[ 0.923492] at24 1-0050: 32768 byte 24c256 EEPROM, writable, 64 bytes/write
[ 0.938659] Board name: A33515BB
[ 0.942016] Board version: 1.4A
[ 0.945312] SKU: SKU#01
[ 0.948394] The board is general purpose EVM in profile 0
[ 0.955047] da8xx_lcdc.0: alias fck already exists
[ 0.960601] da8xx_lcdc da8xx_lcdc.0: GLCD: Found TFC_S9700RTWV35TR_01B panel
[ 0.984222] Console: switching to colour frame buffer device 100x30
[ 1.000946] omap-gpmc omap-gpmc: GPMC revision 6.0
[ 1.005950] Registering NAND on CS0
[ 1.010345] omap_i2c.2: alias fck already exists
[ 1.015625] omap_i2c omap_i2c.2: bus 2 rev2.4.0 at 100 kHz
[ 1.022094] tsl2550 2-0039: standard operating mode
[ 1.027893] tsl2550 2-0039: support ver. 1.2 enabled
[ 1.033752] davinci-mcasp.1: alias fck already exists
[ 1.039581] omap_hsmmc.0: alias fck already exists
[ 1.044982] omap_hsmmc.2: alias fck already exists
[ 1.050567] Configure Bluetooth Enable pin...
[ 1.056579] registered am33xx_sr device
[ 1.060852] _regulator_get: 2-0018 supply Vdd not found, using dummy regulator
[ 1.068511] _regulator_get: 2-0018 supply Vdd_IO not found, using dummy regulator
[ 1.096923] lis3lv02d: 8 bits 3DLH sensor found
[ 1.188537] input: ST LIS3LV02DL Accelerometer as /devices/platform/lis3lv02d/input/input0
[ 1.200347] mtdoops: mtd device (mtddev=name/number) must be supplied
[ 1.207580] omap2-nand driver initializing
[ 1.212249] ONFI flash detected
[ 1.215637] ONFI param page 0 valid
[ 1.219299] NAND device: Manufacturer ID: 0x2c, Chip ID: 0xda (Micron MT29F2G08ABAEAWP)
[ 1.227874] Creating 8 MTD partitions on "omap2-nand.0":
[ 1.233459] 0x000000000000-0x000000020000 : "SPL"
[ 1.239807] 0x000000020000-0x000000040000 : "SPL.backup1"
[ 1.246704] 0x000000040000-0x000000060000 : "SPL.backup2"
[ 1.253601] 0x000000060000-0x000000080000 : "SPL.backup3"
[ 1.260467] 0x000000080000-0x000000260000 : "U-Boot"
[ 1.267608] 0x000000260000-0x000000280000 : "U-Boot Env"
[ 1.274475] 0x000000280000-0x000000780000 : "Kernel"
[ 1.282989] 0x000000780000-0x000010000000 : "File System"
[ 1.393188] OneNAND driver initializing
[ 1.397949] UBI: attaching mtd7 to ubi0
[ 1.401977] UBI: physical eraseblock size: 131072 bytes (128 KiB)
[ 1.408538] UBI: logical eraseblock size: 126976 bytes
[ 1.414154] UBI: smallest flash I/O unit: 2048
[ 1.419067] UBI: VID header offset: 2048 (aligned 2048)
[ 1.425323] UBI: data offset: 4096
[ 3.547027] UBI: max. sequence number: 108
[ 3.567230] UBI: attached mtd7 to ubi0
[ 3.571197] UBI: MTD device name: "File System"
[ 3.576904] UBI: MTD device size: 248 MiB
[ 3.582092] UBI: number of good PEBs: 1988
[ 3.587005] UBI: number of bad PEBs: 0
[ 3.591644] UBI: number of corrupted PEBs: 0
[ 3.596252] UBI: max. allowed volumes: 128
[ 3.601074] UBI: wear-leveling threshold: 4096
[ 3.605987] UBI: number of internal volumes: 1
[ 3.610595] UBI: number of user volumes: 1
[ 3.615234] UBI: available PEBs: 0
[ 3.619873] UBI: total number of reserved PEBs: 1988
[ 3.625030] UBI: number of PEBs reserved for bad PEB handling: 19
[ 3.631408] UBI: max/mean erase counter: 2/0
[ 3.635833] UBI: image sequence number: 1557601074
[ 3.641113] UBI: background thread "ubi_bgt0d" started, PID 603
[ 3.647918] CAN device driver interface
[ 3.651916] CAN bus driver for Bosch D_CAN controller 1.0
[ 3.708221] davinci_mdio davinci_mdio.0: davinci mdio revision 1.6
[ 3.714691] davinci_mdio davinci_mdio.0: detected phy mask fffffffe
[ 3.722106] davinci_mdio.0: probed
[ 3.725646] davinci_mdio davinci_mdio.0: phy[0]: device 0:00, driver unknown
[ 3.733367] usbcore: registered new interface driver zd1201
[ 3.739379] usbcore: registered new interface driver cdc_ether
[ 3.745605] usbcore: registered new interface driver cdc_eem
[ 3.751678] usbcore: registered new interface driver dm9601
[ 3.757537] cdc_ncm: 04-Aug-2011
[ 3.761077] usbcore: registered new interface driver cdc_ncm
[ 3.766998] Initializing USB Mass Storage driver...
[ 3.772369] usbcore: registered new interface driver usb-storage
[ 3.778656] USB Mass Storage support registered.
[ 3.783905] mousedev: PS/2 mouse device common for all mice
[ 3.790649] input: matrix-keypad as /devices/platform/matrix-keypad/input/input1
[ 3.799621] input: ti-tsc as /devices/platform/omap/ti_tscadc/tsc/input/input2
[ 3.808166] omap_rtc am33xx-rtc: rtc core: registered am33xx-rtc as rtc0
[ 3.815216] am33xx-rtc: already running
[ 3.819396] i2c /dev entries driver
[ 3.823669] Linux video capture interface: v2.00
[ 3.828826] usbcore: registered new interface driver uvcvideo
[ 3.834808] USB Video Class driver (1.1.1)
[ 3.839996] lm75 2-0048: hwmon0: sensor 'tmp275'
[ 3.847747] OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec
[ 3.856323] cpuidle: using governor ladder
[ 3.861114] cpuidle: using governor menu
[ 3.938995] omap4_aes_mod_init: loading AM33X AES driver
[ 3.944671] omap4-aes omap4-aes: AM33X AES hw accel rev: 3.02
[ 3.951232] omap4_aes_probe: probe() done
[ 3.955627] omap4_sham_mod_init: loading AM33X SHA/MD5 driver
[ 3.961791] omap4-sham omap4-sham: AM33X SHA/MD5 hw accel rev: 4.03
[ 3.973693] omap4_sham_probe: probe() done
[ 3.980499] usbcore: registered new interface driver usbhid
[ 3.986328] usbhid: USB HID core driver
[ 3.991027] usbcore: registered new interface driver snd-usb-audio
[ 4.001892] mmc1: card claims to support voltages below the defined range. These will be ignored.
[ 4.011962] _regulator_get: 2-001b supply IOVDD not found, using dummy regulator
[ 4.019775] _regulator_get: 2-001b supply DVDD not found, using dummy regulator
[ 4.027435] _regulator_get: 2-001b supply AVDD not found, using dummy regulator
[ 4.035125] _regulator_get: 2-001b supply DRVDD not found, using dummy regulator
[ 4.045654] asoc: tlv320aic3x-hifi <-> davinci-mcasp.1 mapping ok
[ 4.053497] ALSA device list:
[ 4.056610] #0: AM335X EVM
[ 4.059631] oprofile: hardware counters not available
[ 4.064880] oprofile: using timer interrupt.
[ 4.069366] nf_conntrack version 0.5.0 (8018 buckets, 32072 max)
[ 4.076202] ip_tables: (C) 2000-2006 Netfilter Core Team
[ 4.081909] TCP cubic registered
[ 4.085266] NET: Registered protocol family 17
[ 4.089935] can: controller area network core (rev 20090105 abi 8)
[ 4.096466] NET: Registered protocol family 29
[ 4.101104] can: raw protocol (rev 20090105)
[ 4.105560] can: broadcast manager protocol (rev 20090105 t)
[ 4.111511] Registering the dns_resolver key type
[ 4.116516] VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3
[ 4.124511] ThumbEE CPU extension supported.
[ 4.129058] mux: Failed to setup hwmod io irq -22
[ 4.134552] Power Management for AM33XX family
[ 4.139434] Trying to load am335x-pm-firmware.bin (60 secs timeout)
[ 4.146087] Copied the M3 firmware to UMEM
[ 4.150604] smartreflex smartreflex: am33xx_sr_probe: Zero NValue read from EFUSE
[ 4.158447] smartreflex: probe of smartreflex failed with error -22
[ 4.165496] sr_init: platform driver register failed
[ 4.175811] clock: disabling unused clocks to save power
[ 4.194702] Detected MACID=0:18:31:8f:3a:fa
[ 4.200286] cpsw: Detected MACID = 00:18:31:8f:3a:fb
[ 4.207183] input: gpio-keys as /devices/platform/gpio-keys/input/input3
[ 4.214965] omap_rtc am33xx-rtc: setting system clock to 2012-12-17 06:32:24 UTC (1355725944)
[ 4.290069] UBIFS: recovery needed
[ 4.328674] mmc1: queuing unknown CIS tuple 0x91 (3 bytes)
[ 4.369598] mmc1: new SDIO card at address 0001
[ 4.451629] UBIFS: recovery completed
[ 4.455474] UBIFS: mounted UBI device 0, volume 0, name "am335x-evm-rootfs"
[ 4.462738] UBIFS: file system size: 248111104 bytes (242296 KiB, 236 MiB, 1954 LEBs)
[ 4.471099] UBIFS: journal size: 9023488 bytes (8812 KiB, 8 MiB, 72 LEBs)
[ 4.478729] UBIFS: media format: w4/r0 (latest is w4/r0)
[ 4.484802] UBIFS: default compressor: lzo
[ 4.489105] UBIFS: reserved for root: 0 bytes (0 KiB)
[ 4.496643] VFS: Mounted root (ubifs filesystem) on device 0:13.
[ 4.503326] Freeing init memory: 248K
INIT: version 2.88 booting
Starting udev
Starting Bootlog daemon: bootlogd: cannot allocate pseudo tty: No such file or directory
bootlogd.
ALSA: Restoring mixer settings...
No state is present for card EVM
Found hardware: "AM335X_EVM" "" "" "" ""
Hardware is initialized using a generic method
No state is present for card EVM
Configuring network interfaces... [ 8.840667] net eth0: CPSW phy found : id is : 0x4dd074
udhcpc (v1.19.4) started
Sending discover...
Sending discover...
Sending discover...
No lease, failing
done.
INIT: Entering runlevel: 5
Starting system message bus: dbus.
Starting telnet daemon.
Starting syslogd/klogd: done
Starting thttpd.
Stopping Bootlog daemon: bootlogd.
_____ _____ _ _
| _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_
| | _| .'| . | . | | __| _| . | | | -_| _| _|
|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_|
|___| |___|
Arago Project http://arago-project.org am335x-evm ttyO0
Arago 2012.10 am335x-evm ttyO0
am335x-evm login:
I have a question to - i do not understand why the NAND-read in u-boot takes almost 7seconds???Take with your board also so long?
Regards
Simon
Thanks, Simon!
>>Name: am335x-evm-rootfs
That helped greatly, though I still got a ubifs_read_node kernal panic (similar to the one seen here: http://e2e.ti.com/support/arm/sitara_arm/f/791/t/230032.aspx )
When I saw mention of Linux permissions, I went back to: http://processors.wiki.ti.com/index.php/UBIFS_Support#Flashing_UBIFS_image_to_a_NAND_partition
Instead of the "From U-Boot" I followed "From Linux" (using the uboot and files from SD card) and was successful. My detailed steps are below for reference.
>>i do not understand why the NAND-read in u-boot takes almost 7seconds???Take with your board also so long?
That sounds about right on the EVM for reading uImage and I have seen similar at a customer using NAND. There are methods for fast boot (though I have not looked at recently) and many involve booting uImage out of NOR flash. But that adds cost (and complexity to the system).
Another method (especially with consumer or industrial devices) to show a system is booting it to put LED or even display icon on the LCD within uboot.
I've seen various E2E posts on the subject if you search. Thanks again for your help!
"From Linux" steps below starting with the /board-support-bin/filesystem/arago-base-tisdk-image-am335x-evm.ubi" file in am335x-evm-sdk-bin-05.06.00.00.tar.gz and using uboot and files from the SD card FAT32 partition:
ubiformat /dev/mtd7 -f /media/mmcblk0p1/arago-base-tisdk-image-am335x-evm.ubi -s 2048 -O 2048
mount -t ubifs ubi0:am335x-evm-rootfs /mnt/nand
chmod 755 -R /mnt/nand
You can always execute the following as a sanity check for the values above:
mtdinfo /dev/mtd7
ubiattach /dev/ubi_ctrl -m 7
ubinfo /dev/ubi0 -a
Volume ID: 0 (on ubi0)
Type: dynamic
Alignment: 1
Size: 1964 LEBs (249380864 bytes, 237.8 MiB)
State: OK
Name: am335x-evm-rootfs
Character device major/minor: 250:1
Please note you must do a:
sync
shutdown -Pr now
before turning power off or you risk corrupting the NAND filesystem (and have to reflash)
If you are lazy (like me) I found with an SD card inserted (and in NAND boot mode), powering on will boot with filesystem on SD card (not as corruptable as NAND but shutting down still a good idea). And boot is faster if you get the uImage off SD card. If you power up without an SD card inserted and interrupt uboot, you can boot with filesystem on NAND with 2 lines:
set nandroot 'ubi0:am335x-evm-rootfs rw ubi.mtd=7,2048'
boot
and your rootfs will be on NAND:
rootfs on / type rootfs (rw)
ubi0:am335x-evm-rootfs on / type ubifs (rw,relatime)
But again be sure to sync and shutdown before powering off.