We have run into an issues related to the management of interrupts between the ARM (Linux) and DSP (DSPBIOS).
We have hardware generating interrupts on two physical lines. The intent is to have one interrupt line dedicated to generate interrupts for the ARM and another to generate interrupts for the DSP. Currently the GPIO pins are….
GPIO5_7 is the ARM interrupt pin.
GPIO5_8 is the DSP interrupt pin.
Our code runs fine as long as only the DSP code or only the ARM code is using its respective interrupt.
However, we have issues when the DSP code is running using the GPIO5_8 interrupts and otherwise completely independent code on the ARM is using the interrupt in GPIO5_7 runs.
The ARM side stops receiving/processing interrupts on GPIO.
The question is ..
Could this be because both of these interrupt pins are on the same bank?
Is there a way to make this work. That is have interrupts targeting the two different cores (DSP and ARM) in the same bank.
Here is a small section of DSP code.
// DSP only handles interrupts on gpio 5_8
if(gpioRegs->BANK[2].INTSTAT & CSL_GPIO_INTSTAT_STAT24_MASK)
{
// clear interrupt status for gpio 5_8
CSL_FINS(gpioRegs->BANK[2].INTSTAT, GPIO_INTSTAT_STAT24,0);
It seems that sometimes the CSL_GPIO_INTSTAT_STAT24_MASK is already cleared (perhaps by Linux) and the DSP does not process the interrupt.
If we remove the check for CSL_GPIO_INTSTAT_STAT24_MASK in the DSP and just execute the section starting with
CSL_FINS(gpioRegs->BANK[2].INTSTAT, GPIO_INTSTAT_STAT24,0);
Sometime the ARM side will stop processing interrupts.
