I am configuring McBSP in OMAP543X processor & I have configured Mc MCBSP1.MCBSPLP_PCR_REG[7] SCLKME bit = 0 and the MCBSP1.MCBSPLP_SRGR2_REG[13]CLKSM bit = 0 i.e. SRG clock is derived from CLKS. I have following queries
1. What is the frequency of CLKS & how to find this, please point us to proper documents & sections in the document at the earliest.