This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

HWI

Hi

The Question is about HWI ISR( ). I am working on EVM 6670.

I have created an ISR which is invoked due to push operation in Qpend Queue basically for Inter core messaging requirements.

In ISR i am posting Semaphore to the task pended.

Now i am taking some functionality in ISR to the pended task .

So in ISR there is only one statement  "SEMAPHORE_POST()'

All other functions like disable,clear and enable of interrupts (sys/bios Cpintc)  are taken to the taken to the task.

In this way I am achieving kind of Priority Inversion as successive Hwi will only invoke if that particular task has execute Disabling and enabling function.

Is it a valid approach to go with as i wanted some of the SWI to execute instead of receiving message on the core?? 

Regards

Rahul

  • Hi Rahul,

    In the first place why do you want to achieve priority inversion (A lower priority task indirectly preempting a higher priority task)?

    Your approach of moving functions like disable,clear and enable of interrupts (sys/bios Cpintc) to a different task/SWI from the HWI, will result in missing a few HW interrupts, as the previous status of the HWI is not cleared in time (the task which clears the HW interrupts is preempted by some other HWI or higher priority task/SWI).

    My suggestion is not to follow this approach. It takes only a few cycles to perform disable,clear and enable of interrupts (sys/bios Cpintc). Please, let me know if the following approach works for your application:

    HWI_ISR()

    disable CIC host interrupt

    clear CIC system interrupt

    SEMAPHORE_POST()

    enable CIC host interrupt

    I hope this helps.

  • Hi Karthik

    Thanks for the reply !

    I started initially with the approach you are telling ( which is ideal one) and it worked perfectly.

    I have some timing constraints in the processing and i am receiving messages for the advanced Sub frames ( LTE ).

    At times , it is more important to do present sub frame processing instead of receiving messages from other core for advanced sub frames or i can receive messages after doing this present sub frame processing.   

    I worked with this approach of enabling clearing and enabling interrupts after doing that present sub frame processing in the task/SWI and it worked too.

    There is no missing HW interrupts.

    May be because a packet push / a packet in QPEND queue keeps interrupts the common platform interrupt controller until it is served. 

    or you can clarify more

  • Rahul,

    Your understanding regarding the QPEND interrupts is correct. The QPEND signal/interrupt remains high until all the descriptors (or packets) in the QPEND queue are popped out. In other words the QPEND interrupt is deasserted only when the QPEND queue is empty. The following algorithm should work for your case:

    HWI_ISR()

    /* Disable CPINTC0 Host interrupt (CPINTC output) */

    CSL_CPINTC_disableHostInterrupt();

    /* Clear the CorePac Interrupt */

    CSL_intcHwControl();

    In a loop, move all the descriptors/packets for the QPEND queue to another general purpose queue for later servicing (the advance sub-frames from other cores)      

     /* Clear the CPINTC0 Interrupt */

     CSL_CPINTC_clearSysInterrupt();

    SEMAPHORE_POST() // the task pending on this semaphore will be of lower priority than the task currently servicing the present advanced sub-frames. This task will also read the required descriptors/packets from the general purpose queue.

     /* Enable CPINTC0 Host interrupt (CPINTC output) */

    CSL_CPINTC_enableHostInterrupt();