I am successfully performing streaming dma from a coherently allocated kernel source buffer containing a test pattern into a destination userspace buffer using scatter gather mappings and edma chaining.
What I don't understand is the channel allocation from the edma driver call edma_alloc_channel(). There appears to be large gaps between allocations and then when I get beyond a certain limit (ch 55) I get -12 returned which I believe is ENOMEM.
Here is a snippet from my driver debug when the i/o completes successfuly for a 64K transfer which show the gaps in the channel allocation. dmaphysdest in this case are the sg mapped physical pages.
io_list[0]: dmabufsrc 0xffab0000, dmaphyssrc 0x8e290000 dmaphysdest 0x89b4c008 acnt 0xff8, dma_channel 2
[ 201.051464] io_list[1]: dmabufsrc 0xffab0ff8, dmaphyssrc 0x8e290ff8 dmaphysdest 0x89b3b000 acnt 0x1000, dma_channel 3
[ 201.062718] io_list[2]: dmabufsrc 0xffab1ff8, dmaphyssrc 0x8e291ff8 dmaphysdest 0x80904000 acnt 0x1000, dma_channel 4
[ 201.073967] io_list[3]: dmabufsrc 0xffab2ff8, dmaphyssrc 0x8e292ff8 dmaphysdest 0x8097b000 acnt 0x1000, dma_channel 5
[ 201.085218] io_list[4]: dmabufsrc 0xffab3ff8, dmaphyssrc 0x8e293ff8 dmaphysdest 0x89b3c000 acnt 0x1000, dma_channel 6
[ 201.096469] io_list[5]: dmabufsrc 0xffab4ff8, dmaphyssrc 0x8e294ff8 dmaphysdest 0x89b40000 acnt 0x1000, dma_channel 7
[ 201.107717] io_list[6]: dmabufsrc 0xffab5ff8, dmaphyssrc 0x8e295ff8 dmaphysdest 0x89b39000 acnt 0x1000, dma_channel 8
[ 201.118968] io_list[7]: dmabufsrc 0xffab6ff8, dmaphyssrc 0x8e296ff8 dmaphysdest 0x89b49000 acnt 0x1000, dma_channel 9
[ 201.130219] io_list[8]: dmabufsrc 0xffab7ff8, dmaphyssrc 0x8e297ff8 dmaphysdest 0x89b42000 acnt 0x1000, dma_channel 12
[ 201.141558] io_list[9]: dmabufsrc 0xffab8ff8, dmaphyssrc 0x8e298ff8 dmaphysdest 0x89b5e000 acnt 0x1000, dma_channel 13
[ 201.152901] io_list[10]: dmabufsrc 0xffab9ff8, dmaphyssrc 0x8e299ff8 dmaphysdest 0x8097a000 acnt 0x1000, dma_channel 20
[ 201.164333] io_list[11]: dmabufsrc 0xffabaff8, dmaphyssrc 0x8e29aff8 dmaphysdest 0x89b1d000 acnt 0x1000, dma_channel 21
[ 201.175764] io_list[12]: dmabufsrc 0xffabbff8, dmaphyssrc 0x8e29bff8 dmaphysdest 0x8090b000 acnt 0x1000, dma_channel 22
[ 201.187195] io_list[13]: dmabufsrc 0xffabcff8, dmaphyssrc 0x8e29cff8 dmaphysdest 0x8096d000 acnt 0x1000, dma_channel 23
[ 201.198626] io_list[14]: dmabufsrc 0xffabdff8, dmaphyssrc 0x8e29dff8 dmaphysdest 0x89b06000 acnt 0x1000, dma_channel 32
[ 201.210058] io_list[15]: dmabufsrc 0xffabeff8, dmaphyssrc 0x8e29eff8 dmaphysdest 0x808d5000 acnt 0x1000, dma_channel 33
[ 201.221488] io_list[16]: dmabufsrc 0xffabfff8, dmaphyssrc 0x8e29fff8 dmaphysdest 0x80943000 acnt 0x8, dma_channel 34
The transfer then completes ok and the test pattern data verifies without error in the user buffer.
Does anyone know , Ti or otherwise, why the channels are allocated like this, are some channels reserved for something else if so what?
Thanks,
Adrian H.