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Does C6678 support clearNAND?

hi,all

 As the C6678 EVM's NAND Flash is slow. I want to change a NAND with the Micron's clearNAND.

But the SPRUGZ3a(C6678's EMIF User Guide) writes "The EMIF16 module does not support the following features:• NAND Flash that requires chip select to stay low during tR time for reads".

And the Micron's clearNAND"Enhanced ClearNAND Flash Memory MT29FEN32GDECAAXDQ, MT29FEN64GDKCAAXDQ" writes

"Asynchronous Data Input Data is written from DQ[7:0] to the data register of the selected volume on the rising edge of WE# when CE# is LOW, ALE is LOW, CLE is LOW, and RE# is HIGH."

Does that means the C6678 can't support the clearNAND?

And I want to know what's the use of the C6678's CE#.

thanks.

  • The statement in the EMIF16 user's guide refers to a requirement that was generally found in older NAND components.  A good description can be found in the definition of chip enable in earlier versions of the Micron data sheets.  They discuss the concept of the chip enable "don't care" option.  For devices without this option the chip enable had to be held low while a NAND flash was performing the read from the flash array to the block registers.  The time associated with this read is very long and would cause a timeout of the access for out EMIF interface.  NAND devices that have the chip enable "don't care" option allow the chip enable to go high while the NAND completes the read from the NAND array.  The ready/busy signal or the status register can be used to determine when the read is complete. 

    I covered the support for ClearNAND in the following post (http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/194897/697193.aspx#697193).  Note that the ClearNAND does use a Chip enable "don't care" functionality so the limitation in the EMIF user's guide doesn't eliminate the use of ClearNAND.  There are still some issues that you will need to resolve.  We've never used ClearNAND so you'll have to develop the driver yourself.  In addition these devices used 3.3V IOs so you will need a voltage translator to connect it with the C6678.  I would recommend you engage Micron and discuss the limitations of the EMIF interface.  Most of the timing diagrams in the data sheet for the ClearNAND imply that the chip enable stays low for mulitple reads and writes.  This may not be necessary but Micron will have to answer that question.  Chip enables that must stay low for multiple read enables or write enables cannot be supported by EMIF16. 

  • Bill,

    Thank you !

    I will contact Micron.And I have another question.I just have test the C6678 access the ST's NAND.The write speed is 350KB/s.Have you test the speed?How can I improve it?