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AM389x: Performance gain between dual or single DDR EMIF implementation, non-interleaved.

Hi,

My customer needs to know what general system performance gain they could see by placing e.g Code in EMIF0 and Data in EMIF1, versus both Code and Data in EMIF0.

Theoretical ballpark approximation? Existing benchmarks?

This is for an ethernet based power control application. Top level control loop + analytics and housekeeping with regular system communications to modules over Ethernet and CAN.

Thanks.

/Magnus