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dp83848 phy problem

mre
Intellectual 435 points
Other Parts Discussed in Thread: DP83865

Hi,

I'm trying to port dp83848 phy to my am335x board. I have searced some forum then I had little succes but I still have some problems.

I wired  RMII1_CRS,RMII1_RXER,RMII1TXEN,RMII1_TXD1,RMII1_TXD0,RMII1_RXD1,RMII1_RXD0,RMII1_RXERR,RMII1_REFCLK,MDIO_CLK,MDIO_DATA pins to the phy.

I configured all pins' mux correctly by using of {rmii1_pin_mux, PROFILE_ALL, DEV_ON_BASEBOARD} in u-boot code (mux.c)  also tried to set rmii interface without gigabit speed by writing of "__raw_writel(RMII_MODE_ENABLE, MAC_MII_SEL);" and "cpsw_data.gigabit_en = 0; in the int board_eth_init function.

But when I  type "dhcp" on u-boot console I  am gettingbelow output.

link up on port 1, speed 100, full duplex
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
BOOTP broadcast 4
BOOTP broadcast 5
BOOTP broadcast 6
BOOTP broadcast 7
BOOTP broadcast 8
BOOTP broadcast 9
BOOTP broadcast 10

Retry count exceeded; starting again

Is there anythingelse to do? And Why do I get "link up on port 1", I think it must be "port 0" because I use rgmii1 pins.

  • 0
    Intellectual 435 points

    Hi,

    Is there anyone who is informed about it?

  • 0 in reply to mre
    Intellectual 315 points

    hello mre,

    I met the same issue on my custom am335x board.

    Did you solve the it?

  • 0 in reply to xiao jacky
    Intellectual 435 points

    yes I did it, you can solve the issue by following the quotes in the http://e2e.ti.com/support/dsp/sitara_arm174_microprocessors/f/791/p/179031/707533.aspx#707533.

  • 0 in reply to mre
    Intellectual 315 points

    thanks for your reply.

    I' trying to port dp83865  to my custome board.

    I got  the output as below: 

    MII_BMCR val0000= 0x2300
    MII_BMCR val22222= 0x2300
    Auto Negotitation failed for port 0
    link up on port 0, speed 100, full duplex
    BOOTP broadcast 1
    BOOTP broadcast 2
    BOOTP broadcast 3
    BOOTP broadcast 4
    BOOTP broadcast 5
    BOOTP broadcast 6
    BOOTP broadcast 7
    BOOTP broadcast 8
    BOOTP broadcast 9
    BOOTP broadcast 10

    my pin mux for dp83865  is  below:

    static struct module_pin_mux rgmii1_pin_mux[] = {

            {OFFSET(mii1_col ), MODE(2)},                   /* RGMII1_COL */
            {OFFSET(mii1_crs),  MODE(2)},                   /* RGMII1_CRS */
            {OFFSET(mii1_rxerr), MODE(2)|RXACTIVE},         /* RGMII1_RXERR */

            {OFFSET(mii1_txen), MODE(2)},                   /* RGMII1_TCTL */
            {OFFSET(mii1_rxdv), MODE(2) | RXACTIVE},        /* RGMII1_RCTL */
            {OFFSET(mii1_txd3), MODE(2)},                   /* RGMII1_TD3 */
            {OFFSET(mii1_txd2), MODE(2)},                   /* RGMII1_TD2 */
            {OFFSET(mii1_txd1), MODE(2)},                   /* RGMII1_TD1 */
            {OFFSET(mii1_txd0), MODE(2)},                   /* RGMII1_TD0 */
            {OFFSET(mii1_txclk), MODE(2)},                  /* RGMII1_TCLK */
            {OFFSET(mii1_rxclk), MODE(2) | RXACTIVE},       /* RGMII1_RCLK */
            {OFFSET(mii1_rxd3), MODE(2) | RXACTIVE},        /* RGMII1_RD3 */
            {OFFSET(mii1_rxd2), MODE(2) | RXACTIVE},        /* RGMII1_RD2 */
            {OFFSET(mii1_rxd1), MODE(2) | RXACTIVE},        /* RGMII1_RD1 */
            {OFFSET(mii1_rxd0), MODE(2) | RXACTIVE},        /* RGMII1_RD0 */
          //{OFFSET(mii1_refclk), MODE(2)|RXACTIVE},                 /* RGMII1_REFERR */
            {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN}, /* MDIO_DATA */
            {OFFSET(mdio_clk), MODE(0) | PULLUP_EN},        /* MDIO_CLK */
            {-1},
    };

    Any idea for the issue?  thank you very much!