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DDR3 configuration

Wenjun Huang
Expert 1770 points
Other Parts Discussed in Thread: TPS51200

For sprabi1a, 2.6.2, it mentions that we should refer to the final data manual for a definitive confirmation on useable memory configurations and bus widths before proceeding.

I am intending to use TMX320C6672CYP with 2x 256MB DDR3 SDRAM (x16 data width each). Referring to the C6672 data manual, it did not mention about any possible configuration. Possible configuration is shown in sprabi1a instead. So, could I use 2x 256MB DDR3 SDRAM (x16 data width each) for C6672?

  • 0
    Expert 1770 points

    sprabi1a p10 2.4

    Keystone devices support data rates of DDR3 1333MHz and higher.

    Can C66 then be downclocked to 1066, 800MHz? Is these frequencies discrete or continuous (meaning 900MHz allowed)?

    Can it be downclocked to even lower frequencies less than 800MHz?

    Thanks.

  • 0 in reply to Wenjun Huang
    Expert 1770 points

    SPRABI1A error:

    p93:

    DDRCLKOUTP0, N0: Connected SDRAM #1, 2, 3 & 4 to DSP pin:

    There are only 2 SDRAM in this configuration. Should be Connected SDRAM #1 & 2 to DSP pin

    DDRODT0: Connected SDRAM#1 to DSP pin.

    What about SDRAM#2? Should be Connected SDRAM #1 & 2 to DSP pin

  • 0 in reply to Wenjun Huang
    Expert 1770 points

    I am intending to use TPS51200 to supply VTT (for termination) and VREFSSTL (for reference voltage to control and address lines)

    VTT requires 0.75V whereas VREFSSTL requires VDDQ/2 (track VDDQ)

    VO of TPS51200 seems to be able to provide 0.75V. What is the output of REFOUT? Is it VDDQ/2?