Cannot run CE universal_copy example built with CCSv5

Gaston,

The page you refer to is a good one to describe the variety of configurations of the input clock frequency fed to a dmtimer (which is also referred to as “GP Timer” on some devices).  

That code snippet can be used to tell SYS/BIOS the value that has been configured; this is for “information only”, and it doesn’t enable the corresponding frequency selection for the timer.  That is typically done by higher-level entity like the high-level OS, or bootloader, etc., as described in that page.

For your particular case, is there Linux or some other OS running on the A8 that is configuring the system and enabling and setting clocks to the different parts of the SoC?  I’d mentioned the GEL file because usually there will be some controls in the GEL file to explicitly enable the clocks for the timers when they are being used in a debug environment, when for example, the high-level OS is not running and configuring the clocks.  I’ve not used the DM8168, and it sounds like there isn’t this support in that GEL file.

I think the first thing to do is to check the corresponding clock selection register in the Power Reset and Clock Management Module (PRCM) for the timer you are using.  This detailed information is in the Technical Reference Manual (http://www.ti.com/lit/ug/sprugx8/sprugx8.pdf).  For example, look at table 18-21 to determine the name of the clock signal for the timer you are using.  Then look at the corresponding CM_TIMER1x_CLKSEL register in memory to determine which clock is selected.  For example, for Timer 2, look at the CM_TIMER2_CLKSEL register.  The default value for this is 0x1, which would select an external 32KHz clock.  It seems from your code snippet that you want this to be CLKIN instead?  If there is no external 32KHz clock available for your setup then it would explain why the startup code is getting stuck there, because the timer is non-functional and can’t perform a soft reset.  

Another thing that can sometimes happen on these SoC devices is that “emulation suspend” can keep the timer from running.  In the timer’s TIOCP_CFG register there is an EMUFREE bit that determines if the timer is frozen in emulation mode or not.  Even though the C674 may be running, the “ownership” of suspend for the timer might be assigned to the A8.  So unless the A8 is running, the timer will be held suspended.  To determine if this is what is going on, you can poke the EMUFREE bit for the timer in CCS to set it to “1” and see if the timer becomes functional.  I did a quick scan and don’t know how, or if it is possible on the DM8168 to assign this suspend ownership for the timers.  If you find that setting EMUFREE makes the timer functional, then I can ask the device team about this control setting.

Hope this helps.

Scott