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EtherCAT PRU-Firmware issues

Hi,

we're currently porting our EtherCAT Slave Stack to AM335x/ICE. Although upgrading to the Industrial SDK V1.0.0.4 already fixed some, there are still some minor issues remaining:

An EtherCAT write to SM Activate Register (0x0806 for SM0) does not always trigger an "SM Changed" event (0x220.4 set), only a change in the activate bit does that. Every write access shall do that. It's e.g. needed when the Mbx repeat request bit (0x0806.1 for SM0) is toggled - your samples only work correctly as Beckhoff's SCC just polls that bit.

En/Disabling a SM by a PDI write to SM PDI Control Reg. (0x0807 for SM0) automatically re/sets the "Enabled" bit in SM Activate Reg. (0x0806.0 for SM0) after CMD_DL_USER_WRITE_SM_PDI_CTRL was sent to PRU Firmware. The ET1100 is not doing that. (The other way, En/Disabling a SM by an ECAT write to SM Activate Reg, does not touch the "Disabled" bit in SM PDI Control Reg, which is the same with an ET1100)

The documentation (EtherCAT_firmware_API_Guide.pdf) for CMD_DL_USER_WRITE_SM_PDI_CTRL is wrong: it just states "sm_index" as "Param1". But the actual usage contains "sm_index" in the hiByte of "Param1" and the value that was written to the PDI CTRL Reg. as loByte.

Regards,
  Thomas

  • Dear Thomas,

    thanks for this valuable feedback. Is it possible that you send me an e-mail with your contact details? You can reach me at f-walzer (at) ti.com. (Don't want to post a full email here).

    Porting other stacks is something we really want and we can setup some more direct support channels for such cases.

    Regards.

  • Status update:

    the issues reported here are confirmed by our development team. A fix is in testing stage and will be published with the next regular IA-SDK release. Any customers or 3Ps who are working on porting their own stack code onto TI ESC should contact me direct if they run into that issues before the next release.

    Regards.