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Making a McBSP output FSR

I am having trouble getting an McBSP in a 6433 to output a frame sync pulse, possibly because of the HW connections. The design started with FSX as an output and FSR as an input, but now I need to flip the FRS to be an output too. The other end is a Maxim DS26518 telecom framer chip.

I have these connections which will be very hard to change.

DX0 --> RSER (ie rxd)
DR0 <-- TSER (ie txd)
FSX0 --> TSYNC
FSR0 --> RSYNC (this is the change)
16M --> CLKR0
16M --> CLKS0
16M --> T/RSYSCLK (ie the serial data clock on remote device)
CLKX0 -> n/c

What I want to do is to clock in/out serial data at 16MHz, with a FSR and FSX pulse every 2048 bits (8KHz), the pulse is to sync the remote device and trigger DMA transfers inside the DSP.

I have gone thru the setup gude (spru943c) and got a number of bits to set

GSYNC=0, CLKRM=0, DLB=0, FSRM=1, FSGM=1, FSRT=1, FPER=2047, FWID=0, FSXM=1.

It was pretty much what I had, I changed only GSYNC and FSRM.

Applying this lot results in no frame pulses at all,, it even stops the tx frame pulses I used to have.

Have I missed something - well celarly I have but what.

Do I have to set FSR0 as a GPIO output (I cannot find anywhere FSX0 is set as an output and it worked)?

Chris