C6415T: Minimum time for register accesses

Chris,

100-125 ns does seem like a long time, but without your datapoint my guess would have been that 40-50 DSP cycles is realistic. So 100-125 is not out of the question.

This interface is referred to as the Config Bus, and it is not speed-optimized like the memory interface. It is a slow interface and it is shared with accesses to other peripherals.

There is a write buffer in the interface, and my recollection is that it holds about 7 words. Any subsequent reads will flush that write buffer and will incur the delay by stalling the DSP until all writes are completed and then further until the read completes.

Is it possible that your "other lines of code clearing and setting bits" left writes in the write buffer and your measurement method is not starting from a completely static state? You could test this by inserting a long delay loop just before starting the measurement for your 1 write + 2 reads.

Can you rearrange those to be 2 reads + 1 write? If so, you will leave an in-flight write in the write buffer but the DSP can continue its work. This is usually not feasible, but it was worth asking.

How are you measuring your delays?

Regards,
RandyP

Randy,

I am measuring my delays by reading the value of the timer0 count register before and after the function call. I'm thinking that these register reads probably added some extra time to my initial measurements which may have caused them to be off.

Unfortunately, I cannot rearrange the order to anything other than 1 read - 1 write - 1 read. I'm calling two functions (write and read). The write function reads the register, sets or clears a bit on the read value, and writes that value back to the register. The read function only reads the register and masks out a specific bit. The order of these two function calls (write then read) cannot be changed because the call to read is to check to make sure that what was written to an output pin shows up on an input pin through a loop-back connection.

Comparing one call to the read function that only reads and masks out a bit once to another call to the read function that reads and masks out a bit twice I see a difference of about 25 ns so I think my initial measurements were off; however, this is about half of what you said you would've guessed so I'm not sure if this is correct either.

So a new question, does 25 ns sound reasonable or even possible with -O3 (optimization level) and -mf 5 (optimize for speed) for 1 peripheral register read (specifically the PCR register of McBSP1)?

Thanks,

Chris

Signalogic

Randy,

The original 400 ns measurement included the function calls to write and read as well as the timer0 register reads. I used the same method of measurement (using the timer0 count register) and got the time for a call to read for only 1 pin and the time for a call to read for 2 pins. The 25 ns is the difference between these two times which comes down to one extra read of the PCR register and masking of a bit.

My read function can take one or multiple pins as a parameter and the difference is extra iterations through a loop that reads the register and masks the desired bit. I probably should've mentioned this to make it more clear.

Thanks for the help,

-Chris

Chris,

It is good that you consider your question answered. I do not feel that I have been much help here.

Is there a way that your read routine can use a single read of the PCR register into a temporary register, then use that local copy for masking for the one or more pins? The time to read PCR is the big time user of this routine, so minimizing the number of times you have to access the Config Bus will help your system performance.

Best of luck to you.

Regards,
RandyP