Hi，
I have encounter a problem about DDR on our DM648 board.
when DEVICEENABLE0 pin be externally pulled up with a 1-kΩ resistor, I can read & write SPI FLASH (by program running in internal RAM), and also can boot from SPI FLASH.
But When I tried to download .out to DDRII, I get such error information and force to disconnet device :
Trouble Reading Memory Block at 0x800000 on Page 0 of Length 0x440:
Error 0x00000006/-1060
Error during: Memory, Register, An unknown error prevented the emulator from accessing the processor in a timely fashion.
It is recommended to RESET EMULATOR. This will disconnect each target from the emulator. The targets should then be power cycled or hard reset followed by an emureset and reconnect to each target.
When I access DDRII memory space (from 0xE000 0000) by CCS memory view, I get this error information and force to disconnet device :
Error 0x00000002/-1202
Error during: Memory,
CPU pipeline is stalled and the CPU is 'not ready'. This means that the CPU has performed an access which has not completed, and the CPU is waiting. The target may need to be reset. The user can choose 'Yes' to force the CPU to be 'ready'.
When this is done, the user will have the ability to examine the target memory and registers to determine the cause of the CPU stall. If CPU hang is caused by application and it has been forced to be 'ready', the CPU should not be run without a reset.
At first, I think there si some hardware bug about DDRII on our DM648 board. But when I pull DEVICEENABLE0 down, I can dowload .out to DDRII and access DDRII.But I can't set PSC for SPI and boot from SPI FLASH.
DM648 datasheet said DEVICEENABLE0 pin must be pulled up with 1K resistor at device reset.
So I have no idea about what wrong with it?
Best regards,
Frank
