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DMTimer CLK_32KHz read/write register behavior



Hello,

When I configure the Timer4 to use the CLK_32KHz PLL clock, I have some register access issue.

If I write something in the register and then I want to read this register, This read doesn't reflect the data written....

If I introduce some read delay, the read data is correct.... Is it a normal behavior... maybe the DMTimer IP is slower because of the 32KHz clock ?

If the behavior is correct, the Starterware DMTimer DAL (Device abstraction layer APIs for DMtimer) is not correct because it doesn't take this delay into account.

Best regards,

Christian Lambricht