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Fatfs performance

Hi everybody,

I posted this question and hope someone to help me to solve this. I am working on C6748 chip with NAND512W3A2SZA6. I am also using BIOS_6_33_04_39, BIOSPSP 03_00_01_00 and EDMA3_LLD_02_11_05_02. There is a NAND sample using fatfs in the biospsp directory "drivers\examples\evm6748\nand_fatfs" and that I modified the BYTE_COUNT variable so that It could write 2Mb data to NAND. The problem is the fatfs performance. The speed of writing data to NAND is far too slow compared to reading data from NAND. It takes around 1 minute and a half to finish the writing task. I changed the NAND chip to Samsung K9F1208U0C, but the same problem remains.

So, are there any ways to improve the performance of writing data to NAND using Fatfs in biospsp?

Thanks very much.

Duy

  • Duy,

    The NAND write performance is archived in the BIOS PSP datasheet in the docs folder. I am not sure how this will be affected by use of FATFS but have you compared the write performance your reporting with the performance in PSP docs.

    Regards,

    Rahul

  • Hi Rahul Prabhu,

    Thanks for your reply. I think the problem is on FATFS. The speed of Media Block Driver is very fast compared to FATFS. At the beginning, we thought that Block Media driver supports RAW calls to NAND without tracking bad blocks. Therefore we used FATFS for bad-block management and ECC. Now I have read the documents and I saw NAND driver handle a logical table map. It seems that this mapping already takes care of bad-block marking and operations performed on them. Can you help me to confirm that I am right? Then we can use block media driver directly without worrying about bad-block management?

    Thanks a lot,

    Best regards,

    Duy

  • Hi Duy,

    Yes, bad block management and ECC generation is handled by the NAND driver in BIOS PSP. Nand driver uses EMIFA to interface with a NAND device and EMIFA on C6748 has the capability to generate ECC. You can refer to the EMIFA documentation in the Technical reference manual to see how a NAND device has to be interfaced with the EMIFA to generate ECC accurately.

    As far as the driver design is concerned, the bad block management and ECC generation is part of the DDC and LLC modules of the NAND driver and are part of the default driver configuration. To see specifics of this refer to the NAND driver design documentation which you can find in the BIOS PSP installation under the path

    $(PSP_DRIVERS_INSTALL_DIR)/packages/ti/pspiom/nand/docs

    Let me know if there are any questions here.

    Regards,

    Rahul

  • Hi Rahul Prabhu,

    Thanks for your support. I think I am clear now.

    Regards,

    Duy

  • Duy,

    I am not really familiar to BIOS. But I have done optimizations for NAND/SD/MMC/SATA in Linux many a times. Could you please share your read and write performance throughput with and without the FAT filesystem in MB/sec? Let me see whether I can help you out.