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UART special Character detection not working

Hi,

I am doing UART special Character detection test which is not working. Here is my steps and setup :

1. init and configure UART (this part works with other tests).

2. set special character ( setting '#' character to UART_XOFF2 register)

3. FIFO is disabled and UART loopback is enabled (configured UART_FCR and UART_MCR)

4. set special character detect  ( verified this gets enabled properly)

5. set xoff interrupt ( verified this gets enabled properly)

6. set receive interrup.( verified this gets enabled properly)

7. send "#" character to THR

8. wait for "#" character to get transmitted

9. Check interrupt, read UART_IIR, here I get Rx timeout as its value comes as "0xC".

Can you please help me what can be wrong here as I am not getting Xoff interrupt here?

Thanks,

Tejas

  • Tejas,

    Can you please tell us about your setup, including the OMAP device, board, UART port, and software release, that you are using?

    Thank you,

    Gina

  • Hi Gina,

    Following is my setup :

    1. PANDA(omap4430) board --> connected to --> My PC (through RS232 serial cable)

    2.Running Standalone application on PANDA-BOARD at U-boot level, which runs the test for UART special character detection.

    3. UART Loopback is enable on PANDA-BOARD. (and all above steps in previous post ).

    4. Still m not getting xoff interrupt.

    Let me know if you have any question about setup.

    Thanks,

    Tejas

  • any help please? anything you want me to try?

  • Tejas, 

    What value do you have for UART_EFR for the software flow control?  Can you check if the special character is stored in the RX FIFO?  (Why are you disabling the FIFO?)  See TRM chapters  23.3.4.8.1.3.3 and 23.3.4.5.1.1 for some more details.  The OMAP TRMs are available publicly here:  http://www.ti.com/general/docs/wtbu/wtbudocumentcenter.tsp?templateId=6123&navigationId=12037#65

    Regards,
    Gina

  • Hi Gina,

    FIFO is disabled because this operation can be carried our with 1 byte FIFO.

    UART_EFR register is configured as follow : 

    /// For enabling special character detect 

    // Set configuration Mode B = (OFS_LINE_CONTROL = 0xbf) to enable config to UART_EFR register

    store_lcr_reg_val = SIB_DIAG_UART_READ(OFS_LINE_CONTROL);

    SIB_DIAG_UART_WRITE(OFS_LINE_CONTROL,(SIB_DIAG_UART_READ(OFS_LINE_CONTROL)| 0xBF));

    /// enable special character detect with SPECIAL_CHAR_DETECT bit in Enhanced feature register (EFR[5])
    SIB_DIAG_UART_WRITE(OFS_UART_EFR,(SIB_DIAG_UART_READ(OFS_UART_EFR)| EFR_SPECIAL_CHARACTER_DETECT_ENABLE));

    /// Restore  LCR, thus operational Mode
    SIB_DIAG_UART_WRITE(OFS_LINE_CONTROL,store_lcr_reg_val);

    /// For enabling xoff interrupt :

    /// Set configuration Mode B = (OFS_LINE_CONTROL = 0xbf) to enable config to UART_EFR register
    store_lcr_reg_val = SIB_DIAG_UART_READ(OFS_LINE_CONTROL);
    SIB_DIAG_UART_WRITE(OFS_LINE_CONTROL,(SIB_DIAG_UART_READ(OFS_LINE_CONTROL)| 0xBF));

    /// enable XOFF_IT bit in Interrupt enable register (UART_IER [5])
    SIB_DIAG_UART_WRITE(OFS_UART_EFR,(SIB_DIAG_UART_READ(OFS_UART_EFR)| EFR_ENHANCED_EN_ENABLE));

    /// UART_IER register is accessed in Operational Mode only
    SIB_DIAG_UART_WRITE(OFS_LINE_CONTROL,store_lcr_reg_val);
    SIB_DIAG_UART_WRITE(OFS_INTR_ENABLE,(SIB_DIAG_UART_READ(OFS_INTR_ENABLE)| UART_XOFF_INTR_ENABLE));

    I have got successfully xoff interrupt generated but the process deffer little bit the datasheet :

    datasheet says :

    0x1: Special character detect enable. Received data is
    compared with XOFF2 data. If a match occurs, the
    received data is transferred to the RX FIFO and the
    UART_IIR[4] bit is set to 1 to indicate that a special
    character was detected.

    Practical result :

     When I receive the transmitted data, then check for UART_IIR register I get xoff interrupt set.

    So the flow is like this :

    1. set Xoff2 character "DEL".

    2. set loopback mode

    3. send same character in THR register

    4. receive same character by reading RHR register ( question is : before i receive should not it have been checked for xoff2 match?)

    5. check for  UART_IIR register , I get X0ff interrupt generated here. 

    Thanks,

    Tejas

  • Hi Tejas,

    I am glad that you are able to get the XOFF interrupt now!  As the TRM mentions:

    Special character (UARTi.UART_EFR[5]): Incoming data is compared to XOFF2. When the special
    character is detected, the XOFF interrupt (UARTi.UART_IIR[4]) is set, but it does not halt transmission.
    The XOFF interrupt is cleared by a read of UARTi.UART_IIR. The special character is transferred to
    the RX FIFO. Special character does not work with XON2, XOFF2, or sequential XOFFs.

    Since you are able to see the XOFF interrupt generated, I don't understand your question/issue in #4?

    Thank you,
    Gina 

  • Hi Gina,

    The question was this :

    datasheet says :

    0x1: Special character detect enable. Received data is
    compared with XOFF2 data. If a match occurs, the
    received data is transferred to the RX FIFO and the
    UART_IIR[4] bit is set to 1 to indicate that a special
    character was detected.

    here this means , 

    satep 1 : It will automatically detect the character arrived at receive side and compare that to XoFF2 data and will send character to RXFIFO with xoff interrupt on?

    step 2 : OR I have to first receive sent data in loopback mode and the check UART_IIR register for interrupt?

    This was the confusion. Earlier I was trying step 1. but actually succeeded in step 2.

    Thanks,

    Tejas