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booting 8148evm

Dennis McLeod
Intellectual 925 points
Other Parts Discussed in Thread: AM3871

I have an 8148evm and I'm trying to understand the stages of booting prior to U-Boot, and then once U-Boot is executing. I am reading the AM3871 TRM document and the PSP_UBoot doc that came in the EZSDK. I am working with the setup detailed in the setup.sh.. NFS for filesystem and TFTP for kernel.

I'm a bit confused as to why I had to enable NAND on SW2 for this to work. Arent both the uboot-min and uboot-2nd-stage binaries on the SD card? I would assume so, because if i attempt to power on the board without the SD card in there, it won't boot. So how is NAND involved at all? What made the processor jump to executing the uboot-min? Is the SD card mapped to address 0 in memory? Is that how execution begins at power-up..just start executing at address 0?

Thanks in advance for any help!

  • 0
    TI__Genius 11470 points

    Hello, Dennis McLeod

    In case of SD card boot (everything needed is stored there) you would need the NAND just to store the u-boot environment (when you type saveenv in u-boot).  You can rebuild u-boot (2nd stage) to store the environment in i.e. the SPI flash.

    There is some native ROM code that loads the 1st stage from a dedicated place (specified be the NAND/SPI layout) in the flash (i.e NAND or SPI) or searches for MLO in the SD card boot partition and loads it in the DM814x (or similar) internal on-chip RAM; 1st stage makes some inits (i.e. DDR), and 1st stage loads the bigger-sized 2nd stage in the external DDR. Now the 2nd stage is up and the kernel could be started. I hope this helps.

    BR

  • 0 in reply to Vladimir-XID
    TI__Genius 11470 points

    PS: This is valid for DM814x and similar devices, in DM816x a single stage implementation takes place. All this and the previous is described in the newest version of the U-BOOT documentation that comes with EZSDK 5.04.

  • 0 in reply to Vladimir-XID
    Intellectual 925 points

    Thank you. I have found much of the information I was looking for in the documents you mentioned.

    However, I've begun trying alternate booting methods. I'm trying to set up for EMAC booting. I have SW1=00100 and SW2=00. I have my PC set with a static IP and both the 8148evm and my PC are the only two things plugged into a network switch. I see nothing at all when powering up the evm. Not only do I see nothing in wireshark, but the link/act light on the switch for the evm does nothing either.  I have also tried setting SW1=00111, per the 8148 TRM. Both of these BTMODE values should mean EMAC first, but I'm not seeing any activity. Did I miss something?

    Thank you,

    Dennis

  • 0 in reply to Dennis McLeod
    TI__Genius 11470 points

    Hello, Dennis

    Here is some piece of information about the EMAC boot. It is for DM816x, but it should be similar for DM814x.

    http://processors.wiki.ti.com/index.php?title=DM816x_AM389x_EMAC_Boot

    Tell me if you are still having troubles getting the EMAC boot working. When you have problems be sure try to search the wiki also, there are usually tones of useful stuff.

    BR

  • 0 in reply to Vladimir-XID
    Intellectual 925 points

    Thank you for your reply. I did read the link you suggested and I do have the switch settings set as that page mentions. As far as the BOOTP response from the server, etc..  It's not even getting that far. The EVM doesn't even seem to send out the BOOTP request, so there's nothing for the server to respond to.  I saw no LED flashing on the RJ45 connectors (on either end, the EVM nor the switch it's connected to). I also saw no activity on the network (using Wireshark). Has anyone successfully booted an 8148EVM from EMAC?

  • 0 in reply to Dennis McLeod
    Intellectual 925 points

    I think my confusion is because of ambiguity between the TRM for the chip and the U-Boot doc in the PSP. According to the U-Boot docs, both the 1st and 2nd stage of u-boot binaries are in nand. My company is designing a product that will use the chip, but will not have NAND at all.. zero.. 

    So in my reading of the TRM, it appears the chip's ROM code will enumerate boot devices based on the SW1 switch. If I switch to EMAC boot (SW1=00100 or SW1=00111), then the ROM code contains the ability to go out and attempt BOOTP?  *Before* having anything at all to do with nand and u-boot and whatever else. Is that correct?

  • 0 in reply to Dennis McLeod
    TI__Genius 11470 points

    Hello, Dennis McLeod

    Yes, both stages of the boot loader could be stored in the nand, but this is not needed/related to the peripheral boots. As the TRM says (section Peripheral Booting), the ROM code supports standard BOOTP protocol.  This is about the entire boot process. Make sure that all requirements that are described by the TRM and the wiki link I posted are met and tested/verified on your side. All the PC host configurations, DHCP server, etc. If you still are not able to boot your board, write again, please, your are welcome.

    BR

  • 0 in reply to Vladimir-XID
    Intellectual 925 points

    Hello,

    That's what I'm trying to say. I have followed along in all the documents and performed all the steps, but no ethernet BOOTP request is sent from the evm.  I just looked through the board-support/docs/TI81XX_PSP_EMAC_Boot.pdf file and saw a line that says "Ethernet Mac ID e-fused device is required for EMAC Boot."  I have not seen any instructions for how to write a MAC address into the eFUSE register. Perhaps thats why it's failing?  Because the ROM code is unable to find a MAC address for the request?

  • 0 in reply to Dennis McLeod
    Intellectual 925 points

    SOLVED!  The documentation, I'm sorry to say, is awful. Mixed references to SYSBOOT and BTMode and in the board-support/docs/TI81XX_PSP_EMAC_Boot.pdf file it says "ROM Phy Mode selection SW9---> BTM[9:8]" ....   I searched the board high and low for a DIP bank labeled "SW9".  Much to my surprise, SW9 is a single pushbutton RESET switch. SW13 is a 4-position dip bank, and maps to BTMode[9:6] and is what should have been referenced. Without schematics to the eval baseboard, I'm not sure how anyone could have known what was being referred to.

    The problem was that the ethernet phy used on the 8148evm is an RGMII interface. But the evm comes with SW13 set to 0000 (MII mode). From the TRM, section 4.8.4.4, in table 4-32, it says that RGMII mode is with "SYSBOOT[9:8]" set to 10b. So SW13=1000. Also note, that it is crucial for the ethernet link to be connected to J14 and not J27.

  • 0 in reply to Dennis McLeod
    Prodigy 10 points

    If you are using the DM8148 Mistral Evaluation board, make sure that you are connected to a 100Mbps link, not a 1000 BASE-T link.

    We have found that you need a 100 BASE-T connection to see the BOOTP packets on the network!

    This is because the AR8031 PHY on the Mistral Eval board defaults to 100Mbps in its control register.

    The EMAC boot procedure reads the control register and sees 100 Mbps default, not the negotiated speed.

  • 0 in reply to James McDonald
    Prodigy 10 points

    I've managed to use the bootP booting protocol of the processor to download a file to the Evaluation board.  I've setup a DHCP server running under Ubuntu for the booting.

    When I bootp another board, which has a different MAC address, well within the lease time, the board is allocated the same IP address as the first board.  The reason seems to be that the DHCP server sees the same Client Identifier for both boots and assumes it's the same dev card.  I think the Client ID sent during the bootp process is the processor ASIC-ID.

    Is it possible to set a unique ASIC-ID for each processor?