• State Resolved
  • Locked Locked
  • Replies 4 replies
  • Subscribers 98 subscribers
  • Views 373 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS65217B nINT use

Randy Maruschock
Intellectual 320 points
Other Parts Discussed in Thread: TPS65217

In the document SLVU551D, the TPS65217B nINT pin is shown to be tied to GPMC_WEN.  However, from my reading of the datasheet for the TPS65217 I'm not clear what the practicality is of having the interrupt output of the PMIC tied to the write enable of the GPMC.  Is this a misprint?  Or is it on purpose that that PMIC is tied directly to the GPMC in this way? 

Thanks,

Randy

  • 0
    TI__Guru 64510 points

    The gpmc_wen signal of the AM335x has 3 different multiplexing options including the gpmc_wen of the GPMC interface.  Another mode, the most likely mode used in the implementation of the application note, is gpio2_4 which can be setup to interrupt the processor.

  • 0 in reply to BrandonAzbell
    Intellectual 320 points

    Brandon,

    Thank you for the response.  That is a fine interpretation, however, if that was the intent the author I would hope they would have labeled the drawing differently.  The way it is labeled is quite confusing.

    From your response I will take it that my initial interpretation is correct.  nINT of the TPS65217 should not be tied the GPMC_WEN net.  It should be tied to an available GPIO that is set up for interrupts.

    Thanks!

    Randy

  • 0 in reply to Randy Maruschock
    TI__Guru 64510 points

    Randy Maruschock said:

    From your response I will take it that my initial interpretation is correct.  nINT of the TPS65217 should not be tied the GPMC_WEN net.  It should be tied to an available GPIO that is set up for interrupts.

    Just for clarification, the pin associated with GPMC_WEN (pin U8 on ZCE package; pin U6 on ZCZ package) can be configured as a GPIO that is set up for interrupt capability by modifying the multiplex mode (mode 7) with gpio2_4.

  • 0 in reply to BrandonAzbell
    Intellectual 320 points

    Perfectly clear.  Thanks again.