Hi,
I'm looking at C6678 Silicon Errata(SPRZ334E) and have questions about it.
I can't understand the content of page.61 "Usage Note 17 The Clock Input to NETCP Usage Note" .
It is indicated as follow:
"A multiplexer selects between SYSCLK1 or the output of PASS PLL as the input to NETCP.
The multiplexer is controlled by bit 13 (zero indexed) in the PASSPLLCTL1 register."
My question is :
1.Which multiplexer is it talking about?
2.Isn't the input to NETCP only the output from PASS PLL ?
(I thought from C6678 datasheet page.147 Figure 7-25)
3.Isn't bit 13 in the PASSPLLCTL1 register reserved area?
Best regards,
g.f.