Hi,
I have some questions regarding AM3874 XIP Boot options.
According to current silicon errata(SPRZ345A) for Sillicon Revision2.1, there is Advisory 2.1.33 (XIP Boot : High -Order Address Handling (GMPC_A[27:13]Pins).
Advisory 2.1.33 expalins that ROM code does not multiplex the high-order address lines GPMC_A[27:13] during the XIP Boot process.
I know AM3874 revision change will be planned from 2.1 to 3.0. When the timing of this revision change, will ROM code of AM3874 also be changed to modify this Advisory 2.1.33 ?
Then, on silicon revision 3.0, will Table 4-2 XIP (on GPMC) Boot Options on AM3874 datasheet (SPRS695A) be changed? Especially I would like to confirm the pull state of IPU/IPD status never changed.
Please let me know.
Michi