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OMAP4430 ELM

Fabrizio D'Amato1
Prodigy 80 points


Hi All,

I'm trying to enable ELM module under linux, to make that it will work together with GPMC ECC engine.

Do you have some applicatione notes that explain better how interconnect gpmc and elm ?

 

Thanks a lot,

Fabrizio

 

 

  • 0
    TI__Intellectual 2505 points

    Hello Fabrizio,

    We are not familiar with ELM. Is that a memory chip? Also, what processor are you looking to use?

  • 0 in reply to Magdalena Iovescu
    Prodigy 80 points

    Hi Magdalena,

    ELM stands for Error Location module. It is in OMAP4 processor, and it is needed for the location of ECC error.

    Thanks,

    Fabrizio

     

  • 0 in reply to Fabrizio D'Amato1
    TI__Expert 8055 points

    Fabrizio,

    Please see Chapter 15 in the OMAP4 TRM for information about using ELM in conjunction with the GPMC.  The public TRMs can be accessed here: http://www.ti.com/general/docs/wtbu/wtbudocumentcenter.tsp?templateId=6123&navigationId=12037#65

    Regards,
    Gina 

  • 0 in reply to Gina Glaser
    Prodigy 120 points

    Hi Gina, 

    I am working on the same issue as Fabrizio.  The TRM is a bit confuse.  Where is the syndrome polynomial stored?  This is from page 3289, or 15.5.4.2

    "After reading a 528-byte NAND flash sector (512B data plus 16B spare area) with a 16-bit
    interface, a non-zero polynomial syndrome is reported from the GPMC (Polynomial syndrome 0 is used in
    the ELM):
    • P = 0x0A16ABE115E44F767BFB0D0980"

    Where is the P value stored in the GPMC?  Is this value automatically sent to the ELM?  If so, how come there are the ELM_SYNDROME_FRAGMENT_0-6 registers that need to be filled in?  

    Is that value stored in the BCH_RESULTS_0-6?  If so, the TRM is unclear.  

    This is why we post questions on forums as that information is not in the TRM.  

    If you are going to refer someone to the TRM, please be more specific, each chapter is hundreds of pages.

    thanks,

    Vincent

  • 0 in reply to Vince Yee
    TI__Expert 8055 points

    Hi Vincent,

    Now that I have specific questions from you, I am discussing with our expert in this area and will let you know.

    Regards,
    Gina 

  • 0 in reply to Gina Glaser
    Prodigy 120 points

    Thanks Gina,

    We would like to use as much of the hardware as possible. 

  • 0 in reply to Vince Yee
    TI__Expert 8055 points

    Vincent,

    Here is a full description of how the ELM error correction works with GPMC.  I believe this should answer your questions.

    During writes, the internal GPMC ECC engine computes a polynomial remainder. When all of the necessary data have been written to the memory, the user should read this remainder from the GPMC_BCH_RESULT_x. Not all results registers need to be read. The 4-bit error correction level only requires 52 bits / 13 nibbles, which can be found in GPMC_BCH_RESULT_0 (bits [31:0]), and the LSB of GPMC_BCH_RESULT_1 (bits [51:32]). Similarly, 8-bit correction uses registers GPMC_BCH_RESULT_0, GPMC_BCH_RESULT_1, GPMC_BCH_RESULT_2, and GPMC_BCH_RESULT_3. 16-bit correction uses all GPMC_BCH_RESULT_x. This remainder information should now be written into the page spare area.

    When reading back the page from the memory, the same computation happens until you have exhausted all data. At that point, and if no error has been detected, the information in the GPMC_BCH_RESULT_x registers will be the same as when you finished your data writes. If at least one bit was in error, the register values will be different – most probably vastly different. You should now read the remainder from the page spare area. If there was no error, those reads will zero out the result registers. If any of the GPMC_BCH_RESULT_x registers is still not zero at that point, at least one error was detected. This is when the ELM is required. 

    The ELM abstracts the error location steps. The GPMC_BCH_RESULT_x registers should be copied to the ELM_SYNDROME_FRAGMENT_x registers in the exact same order. Note that the ELM contexts, i.e. every set of ELM_SYNDROME_FRAGMENT_x registers, is GPMC-agnostic, and any available one may be used at any time to initiate a computation. This does not depend on the CS the memory was connected to, for instance. Once all ELM_SYNDROME_FRAGMENT_x registers are ready, the ELM logic kicks in, and will give you both an information on the number of errors detected, and on the address within the page of each error. Software is now responsible for correcting each and every significant bit in error. If an error is detected in the remainder itself – this is a possible scenario – then the user can simply ignore this one.

    Regards,
    Gina

  • 0 in reply to Gina Glaser
    Prodigy 120 points

    Thanks Gina!  also, i cannot see a "verify answer" button on any post.

  • 0 in reply to Vince Yee
    TI__Intellectual 2505 points

    Hello Vince,

    You can see a 'verify' button only for threads you start. On this thread, you are not the original poster. So it would be great if Fabrizio can help by verifying.

    Thank you,

    Magdalena

  • 0 in reply to Magdalena Iovescu
    Prodigy 80 points

    Hi Magdalana,

    Thanks for your answer. I was out and I couldn't verify it. I will provide to follow your suggestion as soon as possible.

    Sorry not to do that until now.

    Best Regards,

    Fabrizio

     

  • 0 in reply to Fabrizio D'Amato1
    Prodigy 80 points

    Hi Magdalena,

    I'm trying to use ELM but I got an issue that I will report you soon after that I do the following assumptions:

                   1. I'm using the module in 8 bit ecc error correction mode.

                   2. I'm reading from the NAND in step of 512 byte.

                   3. I'm using the prefetch with IRQ mode

                   4. I'm using ELM in contiunuos mode

     

    The issue is the following:

    Once I read a block of 512 byte from the NAND I get the syndrome from GPMC and I'll fed ELM_SYNDROME_FRAGMENT registers with the same values. Further I'll enable the calculation (setting up SYNDROME_VALID bit) but even if ELM_IRQ_STATUS (LOC_VALID) is 1 the ECC_CORRECTABLE bit ECC_NB_ERRORS bit field are both 0.

    I can't figure this out. If ECC_NB_ERRORS bit field is 0 it means that It has not found any error so why ECC_CORRECTABLE bit won't go high ?

    Best Regards,

    Fabrizio

     

     

     

     

     

     

     

  • 0 in reply to Fabrizio D'Amato1
    Guru 31670 points

    Fabrizio,

    Could you please send me the following files to renjith.thomas@pathpartnertech.com? Also could you please let me know the Linux kernel version that you are using?

    1. arch/arm/mach-omap2/board-omap4xxx.c or your corresponding board file. 
    2. arch/arm/mach-omap2/board-flash.c
    3. arch/arm/mach-omap2/gpmc.c
    4. drivers/mtd/nand/nand_base.c
    5. drivers/mtd/nand/omap2.c
  • 0 in reply to Renjith Thomas
    Prodigy 80 points

    Hi Renjith,

    I'm really sorry but I can't share this code because the access is internal at my company.

    Best Regards,

    Fabrizio

     

     

  • 0 in reply to Fabrizio D'Amato1
    TI__Expert 8055 points

    Fabrizio,

    Sorry for the delay.  ECC_CORRECTABLE = 0x0 indicates that the ECC error-location process failed.  Thus, the 0 value for ECC_NB_ERRORS cannot be trusted.  This could be an issue in your software.  Does the NAND block read complete successfully?

    Regards,
    Gina 

  • 0 in reply to Gina Glaser
    Prodigy 80 points

    Hi Gina,

    Don't worry for the delay. I had solved my issue. I put the wrong values on the ELM registers. Right now all it seems to work correctly. I've enabled ELM and tested it as well.

    Thanks a lot for your help,

    Fabrizio