Hynix HY27UF082G2B NAND Flash for 674x / L138 / OMAP

Mark,

This is generally a difficult question for us to answer, and we can`t confirm either way until we have a proven use case that we know of that has worked(or not) for us or or for one of our customers. I can confirm that Hynix NAND HY27UF084G2B has been tested on one of our Davinci devices(DM335) that have the same NAND design requirements as C674x/OMAPL device. We have tried to document all of the known NAND usecases here:

http://processors.wiki.ti.com/index.php/List_of_NANDs_devices_supported_by_TI_RBLs

There are a couple of wikis that provide a overview of all considerations that an designer must consider before picking the NAND:

http://processors.wiki.ti.com/index.php/Determining_compatibility_between_ROM_Bootloader_%28RBL%29_and_Raw_NAND_devices

http://processors.wiki.ti.com/index.php/Davinci/Sitara/Integra_Nand_Boot_FAQ

Considering the Hynix NAND under consideration is an ONFI compatibile and a similar NAND from this family has been used with one of our devices, I believe there shouldn`t be any issues.

NAND on C674x and OMAPL devices is interfaced using EMIFA which is also responsible for the ECC generation that is used by the RBL so you might also want to check EMIFA chapter in the technical reference manual on how to connect the NAND while interfacing. Since you plan to use NAND for boot , the bootloader app note provides all of the restrictions and constraints on using NAND.

Sorry for pointing you to a lot of resources but I wanted to give you the complete picture so that you can make an informed decision.

Regards,

Rahul

Hi Rahul,

Thanks for the reply, clarifies a number of points.

Looking at the latest SYS BIOS PSPBIOS  driver for the EMIFA it quotes supporting 4-bit ECC. 4-bit ECC seems to be supported by the Micron but not the Hynix part  which quotes 1-bit, this may just be internal correction. Is this something we need to concern ourselves with if we were to use the Hynix part?

Based on what you've said and the availability of the 4G Micron part it looks like we could use a non-listed part but I think we're going to bottle out and use one from the list.

One last question if I could. We've inherited the board design from a sub-contractor and now about to commit the board to fab. The NAND interface has been implemented per the technical reference manual, however another pin exists on the Flash, "nWP" which invokes memory protection. The schematic  design we are reviewing connects it to "EMA_A[11]/PRU1_R30[19]/GP5[11]/PRU1_R31[19]" pin. I trawled the documenation and can't see any TI driver requirement to do this, I'm assuming this was put in so could be controlled by GP5[11]? Anything I've missed here?

Thanks.

Regards.

Mark

Hi Mark,

Please refer to this post that I have responded to this morning regarding 4bit ECC in RBL vs 1b ECC specified in the NAND datasheet and let me know if this answers your query:

http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/p/199908/723327.aspx#723327

I would have to agree with your assumption reagarding nWP pin. This might be a special pin on your NAND for memory protection as this not really required while interfacing with the EMIFA port which is why you don`t see a driver requirement.

Regards,

Rahul