Setting RX-TX triggerlevels confusion

Tejas Upadhyay

Hi,

Here is how I set TX-RX trigger levels , please suggest me if something wrong here as I am not getting the trigger level RHR inerrupt :

RX :

/// To write to FCR[5:4] , need to enable UART_EFR[4] = 1

/// Set configuration Mode B = (OFS_LINE_CONTROL = 0xbf) to enable config to UART_EFR register
store_lcr_reg_val = SIB_DIAG_UART_READ(OFS_LINE_CONTROL);
SIB_DIAG_UART_WRITE(OFS_LINE_CONTROL,(SIB_DIAG_UART_READ(OFS_LINE_CONTROL)| 0xBF));
/// enable special character detect with ENHANCED_EN_ENABLE bit in Enhanced feature register (EFR[5])
SIB_DIAG_UART_WRITE(OFS_UART_EFR,(SIB_DIAG_UART_READ(OFS_UART_EFR)| EFR_ENHANCED_EN_ENABLE));
read_efr_reg = (SIB_DIAG_UART_READ(OFS_UART_EFR));

/// operational Mode ,OFS_MODEM_CONTROL[6] to enable access to TLR register
SIB_DIAG_UART_WRITE(OFS_LINE_CONTROL,store_lcr_reg_val);
store_mcr_reg = SIB_DIAG_UART_READ(OFS_MODEM_CONTROL);
SIB_DIAG_UART_WRITE(OFS_MODEM_CONTROL,(SIB_DIAG_UART_READ(OFS_MODEM_CONTROL)| 0x40));
/// go back to configuration mode B
SIB_DIAG_UART_WRITE(OFS_LINE_CONTROL,(SIB_DIAG_UART_READ(OFS_LINE_CONTROL)| 0xBF));

switch(triggerLevelMethod) {
case 1:
/// To set rigger level =8, UART_SCR[7] =0 and UART_TLR[7:4]=0 and UART_FCR[6:7]=00
SIB_DIAG_UART_WRITE(OFS_UART_SCR, SIB_DIAG_UART_READ(OFS_UART_SCR) & UART_RXFIFO_TRIGGERLEVEL_M1_SET_SCR);
SIB_DIAG_UART_WRITE(OFS_UART_TLR, SIB_DIAG_UART_READ(OFS_UART_TLR) | UART_RXFIFO_TRIGGERLEVEL_M1_SET_TLR);
/// Restore MCR and LCR, thus operational Mode
SIB_DIAG_UART_WRITE(OFS_LINE_CONTROL,store_lcr_reg_val);
SIB_DIAG_UART_WRITE(OFS_MODEM_CONTROL,store_mcr_reg);
/// FCR can be writtern in operational Mode or in configuration mode A
SIB_DIAG_UART_WRITE(OFS_FIFO_CONTROL, SIB_DIAG_UART_READ(OFS_FIFO_CONTROL) & UART_RXFIFO_TRIGGERLEVEL_M1_SET_FCR);
//printf(" TLR = %x,read_efr_reg = %x,MCR =%x \n",SIB_DIAG_UART_READ(OFS_UART_TLR),read_efr_reg,SIB_DIAG_UART_READ(OFS_MODEM_CONTROL));
break;
case 2:
/// To set rigger level =8, UART_SCR[7] =0 and UART_TLR[4:7]=1000
SIB_DIAG_UART_WRITE(OFS_UART_SCR, SIB_DIAG_UART_READ(OFS_UART_SCR) & UART_RXFIFO_TRIGGERLEVEL_M1_SET_SCR);
SIB_DIAG_UART_WRITE(OFS_UART_TLR, SIB_DIAG_UART_READ(OFS_UART_TLR) | UART_RXFIFO_TRIGGERLEVEL_M2_SET_TLR);
/// Restore MCR and LCR, thus operational Mode
SIB_DIAG_UART_WRITE(OFS_LINE_CONTROL,store_lcr_reg_val);

SIB_DIAG_UART_WRITE(OFS_MODEM_CONTROL,store_mcr_reg);

break;

}

over 13 years ago

0 Gina Glaser over 13 years ago

TI__Expert 8055 points

Tejas,

It is difficult to follow your code dump, since I don't know how all of your variables are defined; however, I suggest you check section 23.3.4.6.1.2 in the OMAP TRM on the settings for RX FIFO trigger level. Also, in your code, you mention:

To set rigger level =8, UART_SCR[7] =0 and UART_TLR[7:4]=0 and UART_FCR[6:7]=00

To set rigger level =8, UART_SCR[7] =0 and UART_TLR[4:7]=1000

I think you mean UART_TLR[7:4] should be 0x1000?

Regards,
Gina

0 Tejas Upadhyay over 13 years ago in reply to Gina Glaser

Prodigy 130 points

yes .

I will try to explain you steps theoretically :

For triggerLevel Method 2 :

1. Set configuration Mode B = (OFS_LINE_CONTROL = 0xbf) to enable config to UART_EFR register

2. // set operational Mode ,OFS_MODEM_CONTROL[6] to enable access to TLR register

3. // set trigger level =8, UART_SCR[7] =0 and UART_TLR[4:7]=1000,

yes UART_TLR[4:7]=1000; is it wrong understanding for triggerLevelMethod 2?

4. /// Restore MCR and LCR, thus operational Mode

Thanks,

Tejas

0 Gina Glaser over 13 years ago in reply to Tejas Upadhyay

TI__Expert 8055 points

Tejas,

What is the OFS_LINE_CONTROL that you mentioned? In the OMAP TRM (section 23.3.4.7.2.1), I see that address offset 0x008 is needed in order to write to UART_EFR using Configuration Mode B. Similarly, what is the OFS_MODEM_CONTROL that you mentioned? In the TRM, I see that the address offset 0x01c is needed in order to write to UART_TLR using the Operational Mode.

For triggerLevel Method 2, I assume you are referring to the 2nd line of Table 23-150 ("RX FIFO Trigger Level Setting Summary") in the OMAP TRM? I assume you are also changing to Configuration Mode B, offset 0x040, in order to write to the SCR register as well?

Regards,
Gina

0 Tejas Upadhyay over 13 years ago in reply to Gina Glaser

Prodigy 130 points

Hi,

Sorry for writing register's names in my terminology. OFS_LINE_CONTROL = UART_LCR and OFS_MODEM_CONTROL = UART_MCR.

As OMAP TRM 23.3.4.7.1.3 says , UART_SCR can be configured in all three modes. where as UART_TLR can be configured in configuration Mode B with sub configuration mode (TCR_TLR mode (see Section 23.3.4.7.1.2, Register Access Submode). so to gain access to UART_TLR I do following configurations :

1. Set configuration Mode B = (UART_LCR = 0xbf) to enable config to UART_EFR register

2. UART_EFR[4] = 1

3. set oprational mode (UART_LCR[7] = 0x1 and UART_LCR[7:0] != 0xBF)

to set UART_MCR = 0x40

4. go back to configuration mode B , (UART_LCR = 0xbf)

And then I set trigger level by this settings :

--> // To set rigger level =8, UART_SCR[7] =0 and UART_TLR[4:7]=1000

UART_WRITE(OFS_UART_SCR, UART_READ(OFS_UART_SCR) & UART_RXFIFO_TRIGGERLEVEL_M1_SET_SCR);
UART_WRITE(OFS_UART_TLR, UART_READ(OFS_UART_TLR) | UART_RXFIFO_TRIGGERLEVEL_M2_SET_TLR);

And then I go back to operational mode.

I assume here that triggerLevel should be set to 8, please conform the settings ...

0 Gina Glaser over 13 years ago in reply to Tejas Upadhyay

TI__Expert 8055 points

Tejas,

I confirmed with our expert that your method of setting TLR seems correct. Note that there must be at least 8 characters reception before the RHR interrupt triggers (and RHR interrupt is also enabled). There are 3 options to set the RX trigger level to 8 (assuming that the FCR[0] (FIFO_EN) is set):

SCR[7] = '0', FCR[7:6] = "00". In this case there is no need to change the TLR register (or any registers, this is the default value).
SCR[7] = '0', FCR[7:6] = "00" and setting TLR[7:4] = "0010" (2x4 = 8 trigger level, not "0001" which would mean 1x4 = 4 trigger level).
SCR[7] = '1', FCR[7:6] = "00" and setting TLR[7:4] = "0010" ( TLR[7:4]&FCR[7:6] = "001000" x 1 = 8 trigger level)

Regards,
Gina

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Setting RX-TX triggerlevels confusion