This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

problem about aif on C6474

Other Parts Discussed in Thread: TMS320C6474

In AIF user's guide, it says:"Both OBSAI and CPRI support inter-TMS320C6474 communication. Control messages for OBSAI and vendor-specific control words for CPRI provide the capability for non-IQ data transfer. " Does this mean the data between DSPs can not be transfered in IQ format?

  • I'm a beginer to AIF of C6474, and I want to use AIF to transmit baseband data to RF device, but I really don't know how to debug the AIF device on C6474. Is there anyone could help me?

  • AIF has so many registers that we can check link status and problems in each module. AIF Users guide shows all information you need. Please read the whole UG at least twice, then you will see what needs to be done and what you can do as a next step. our CSL also has some example code which may give you an idea how to configure and how to use each register. 

    Regards,

    Albert

  • the inter communication described in that section is about control message between DSP. normally, we do not think the IQ data is used for inter DSP communication.

    IQ data is just retransmitted or redirected between DSPs in the daisy chain. see the topology chapter in UG. it will tell you how you can design DL, UL IQ data flow in the chain. for DL, IQ data will be transmitted from the first DSP in the chain to the Radio head. for UL, the IQ data from RH will go through the chain until it reaches the final DSP.

    Regards,

    Albert 

  • Thanks for your answer. And could I understand like this: IQ data can be used for inter DSP communication but we usually do not use them to do so?

  • I found the example discribed in sprab58 are implemented on TCI6488, could the example work out on TMS320C6474? 

  • Hi, I have tried the example on C6474, and it seems works well, but I'm wondering why link 3 and link 4 can not get any good frame?

  • Hi,

    I'm not sure what kind of example project you are using but I think you'd better start your testing with AIF2 LLD that included in our BIOS MCSDK.

    you can download this MCSDK from our external website and this SDK has several example project for AIF2 and it is fully tested on our EVMs.

    Regards,

    Albert

  • Sorry, and the project is with the application report "TCI648x Antenna Interface Programming", and I notice that you are one of the authors.

  • Sorry to bother you again, in my project, DSP1 transfers data to DSP2 and DSP2 do not redirect these data, so my question is how can I change the code based on sprab58?

  • You are asking question continously without explaining detail what you are trying to do and what you already know. our example is normally use loopback mode to send and receive data from one DSP. you need to fully understand daisy chain concept if you want to connect multiple DSP with redirection. AIF2 UG shows how you can configure RT module for this purpose. see RT register map to get some idea about how it can be configured. unfortunately, I don't have any example code like you are trying to do. Anyway, redirection doesn't require to use Protocol decoder and the received data can be directly forwarded by RT.

    Regards,

    Albert

  • What I want to do is implement inter-DSP communication without data redirection, that means what DSP1 need to do is to transfer data to DSP2 through AIF and what DSP2 need to do is to receive data from DSP1 and check its correction. So what I want to do seems easier than your project in prab58, and I want to implement my project based on your project, but I'm a little bit confused to start with the code modifying. Anyway, thanks for your reply!

  • I don't know what is the prab58 project but basically, TI example project use loopback mode and it tranfer data from Egress to Ingress. If you turn off loopback mode from the code, you may transfer the frame from one DSP to the other one in the chain. If you are using TI EVM, you need to use common aif2 reference clock for both DSP (I'm not sure what kind of EVM you are using) and frame sync signal should be shared by triggering from DSP Timer0. Please install our BIOS-MCSDK and see AIF2 LLD example for more detail.

    Regards,

    Albert  

  • http://focus.ti.com/general/docs/litabsmultiplefilelist.tsp?literatureNumber=sprab58, I notice that you are one of these authors, and I ues TMS320C6474