Just wanted to point out this potential issue in version 02.30.00 of the A8 BSP - apologies if this has been discussed before.
C:\WINCE700\PLATFORM\COMMON\SRC\SOC\COMMON_TI_V1\COMMON_TI\SDHC\BASE\sdhc.cpp, line 601:
BOOL CSDIOControllerBase::IsMultipleBlockReadSupported()
{
BOOL bVal = FALSE;//TRUE;
// work around for a OMAP35XX silicon issue (data CRC error on READ_MULTIPLE_BLOCK command)
// This is present in earley processor revisions
if(m_dwCPURev <= CPU_FAMILY_35XX_REVISION_ES_3_0)
{
bVal = FALSE;
}
return bVal;
}
A few problems with this function:
1)
It always returns FALSE.
As a result, the SDHC driver passes SD_SLOT_USE_SOFT_BLOCK_CMD53_READ to the bus driver - an obvious performance problem.
I suspect the code was modified for testing, and someone forgot to change the bVal initialisation back to TRUE.
2)
The code assumes the CRC error occurs on ES3.0 silicon, but according to advisory 2.1.1.128 in my copy of the OMAP errata, it was actually fixed in 3.0.
3)
As far as I can see, all the SD interfaces on a given CPU would have block read operations disabled, even though only MMC1 and MMC2 are affected on the OMAP.
