Modifying uppEvm example code to work with ADS901

Hi Tariq,

The uppEvm application that comes with the PSP demonstrates the use of the Upp driver in EVM to EVM communication mode. We have not tried communicating to(not tested with) the ADS901. But shall try to help you how much I can..

I think you can make use of the pspdrivers uppEvm application for your use case. As you mentioned,

Tariq Siddiqui said:

Channel A will be used to receive data so uppParams.devMode has to be modified to Upp_DevMode_CHAN_A_RCV

This is appropriate.

Tariq Siddiqui said:

What I don't understand is that how ADS901 is connected or mapped with UPP ? How can I configure UPP to drive ADS901 to start sampling ?

For this, you might have to go through the EVM/board specific schematics and also its UI Daughter card schematics to understand the connections or to check if connectivity is available. If the connections are available, then the pinmux has to be done accordingly.

In the pspdrivers, all the EVM Initialization library(evmInit) which contains pinmux enabling routines for peripherals used by the application, and related device pre-driver initialization routines are done in “pspdrivers_01_30_01\packages\ti\pspiom\platforms\evmOMAPL138\src”. If you refer the “upp_evmInit.c” file, there is a function which enables the pinmux for the uPP device and also enables the DAC/ADC on the UI daughter card so that the uPP can be interfaced to the DAC/ADC. Go through the entire file and double check the settings.

Refer to the complete “upp_evmInit.c” file, and you might get a rough idea as to how to proceed further.

NOTE: Any changes made to “upp_evmInit.c” file, you will have to rebuild the platforms

Have you modified the application and started communicating with the ADC? What is the present status?

Best Regards,

Raghavendra

Hi Raghavendra,

I have gone through the "upp_evmInit.c" file but I am really confused :S

configureUpp(Void) function enables the pinmux for the uPP device. It also enables the DAC on the UI daughter card so that the uPP can be interfaced to the DAC. It doesn't say any thing about ADC. Does it also enable ADC interface with UPP ?

configureUppDacAdc(Void) - is it the only function in addition to configureUpp(Void) which I need to call in the modified application ?

uppConfigureCdce913(Void) function configures the clock source for the ADC, does it use UPP clock as a sourse to ADC ? How can I select the desired sampling frequency ?

After configuring UPP and ADC, what are the pins to see if the UPP port and the ADC have the clock setup correctly using a scope and if the data is visible on the channel when START signal is enabled.

I also found difficulty to understand how data is being transmit and received in uppEvmA sample application. I have no idea how this SIO_reclaim works ? But first need to setup UPP and ADC correctly.

Thanks for your help.

Regards,

Tariq

Hi Tariq,

The whole idea of introducing you to the “upp_evmInit.c” file was to give you a rough idea as to how to drive an ADC using the UPP.

If you refer to the UI daughter card schematics,  the ADC pins are muxed with the VPIF_DIN pins – This needs to be done(configured) by you. And on the baseboard, the LCD and VPIF/UPP pins are muxed – “configureUpp(…)” will enable the pinmux for the upp device.

If you refer to the IO Expander(PCF8575) in UI daughter card schematics, You can see the “ADCO_SELn” “VIDEO_SELn” “CAMERA_SELn” lines. The IO Expander needs to be configured using I2C to select the appropriate lines. In “upp_evmInit.c” there are functions that configure ADC(Cdce913) which is related to camera configured using I2C. You cannot use these functions directly. You will have to write similar functions to configure your device ADS901(ADC) using I2C.

I did browse for a while and came across a post which is very much suited for your requirement -  http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/p/36108/127754.aspx#127754 I guess with this, you should be good to go!

Tariq Siddiqui said:

After configuring UPP and ADC, what are the pins to see if the UPP port and the ADC have the clock setup correctly using a scope and if the data is visible on the channel when START signal is enabled.

If you refer section 18.12.1.3 of the OMAPL138_BIOSPSP_Userguide, it describes the UPP pin connections that are available on the EVM. The pin connections are available on J29(UPP Instance 0).

Tariq Siddiqui said:

I also found difficulty to understand how data is being transmit and received in uppEvmA sample application. I have no idea how this SIO_reclaim works ?

Please refer section 18.12.1 of the OMAPL138_BIOSPSP_Userguide. The uppEvmA and uppEvmB is a EVM to EVM communication application. First, the uppEvmA app(on EVM1) is run wherein the channel A primes buffers and waits for the data to be read. Technically, the uppEvmA app hangs forever until no data is sent from the other EVM. Then, the uppEvmB application(on EVM2) is run which writes data continuously. The uppEvmA application resumes and starts reading this data. 100 iterations of 1024 data bytes each are transferred from EVM2 to EVM1. The same is tested viceversa.

For details regarding the SIO_reclaim(..), please refer to the BIOS Userguide.

Best Regards,

Raghavendra

Hi Raghavendra,

Thanks for your help. I will go through them and update you the progress.

I can see in UI daughter card schematic that ADC data pins are muxed with VPIF_DIN pins but what are these numbers (2,8), (2) and (2,7,12) written in RED next to VPIF_DINX?

Thanks.

Raghavendra,

I am still trying to get ADC working, I will be away for some time so won't be able to work. I will update about my progress and bother you again once back.

Meanwhile, If you do find working code for ADS901 using UPP, please pass it to me.

Thanks.

Regards,

Tariq Siddiqui

Raghavendra,

I am still unable to get ADC of UI board working. I gone through the upp_evmInit.c but couldn't quite figured out how to make it work. I think following are the settings for enabling ADC. Am I correct ? 

#define PINMUX14_VALUE 0x11111111
#define PINMUX15_VALUE 0x11111111
#define PINMUX16_VALUE 0x11111111
#define PINMUX17_VALUE 0x11111111
#define PINMUX18_VALUE 0x00000011
#define PINMUX19_VALUE 0x00111100

From UI board schematic, I can see how to select ADC using IO Expander but I don't know how to do it using the code. I don't know how to modify evmInit.c to configure sampling frequency for ADC. It appeared way too complicated for me than I thought.

I have already spent a lot of time figuring out how to do that but all in vain. It's a pity that there is no built in BIOS code to exercise ADC. Can you please provide me a simple code using UPP to get continue data from ADC ? I would appreciate your help.

Thanks.

-Tariq

Hi Tariq,

We do not have the application code you are looking for. The example applications in the BIOS PSP drivers are provided to demonstrate minimum capablities of the drivers. Any other configuration the user wishes to have needs to be done by referring to the board schematics and specs.

You can post your queries in the C674x DSP Forum - http://e2e.ti.com/support/dsp/tms320c6000_high_performance_dsps/f/115.aspx and might get some help/code to communicate to the ADC. 

Best Regards,

Raghavendra

Hi Raghavendra,

I understood but you can atleast answer what I have asked in my earlier post about PINMUX and IO Expander.

Thanks.

Sorry Tariq, missed that out..

The PINMUX seems to be fine. 

Tariq Siddiqui said:

I can see how to select ADC using IO Expander but I don't know how to do it using the code.

If you refer the "uppConfigureIoExp(..)" in upp_evmInit.c file, they are selecting the "VIDEO_SELn" line by writing "0x20". For "ADCO_SELn" you can select by writing "0x80"

Hope this helps..

Best Regards,

Raghavendra 

Hi Raghavendra,

I modified the code to enable PINMUX for ADC and UPP but I can't see those register setup after the code is being executed. Can you have a look what's wrong there ? After PINMUX I called UppDacAdc function to configure ADC and used  i2cRegVal[0] = 0x80 to selec ADC.

Void main(Void)
{
  
    configureUpp();
    configureUppDacAdc();
    
    return;
}

#define PINMUX4_I2C_ENABLE      0x00002200u
#define PINMUX13_UPP_ENABLE     0x44440000u
#define PINMUX14_UPP_ENABLE     0x44444400u
#define PINMUX15_UPP_ENABLE     0x44444444u
#define PINMUX16_UPP_ENABLE     0x44444444u
#define PINMUX17_UPP_ENABLE     0x44444444u
#define PINMUX18_UPP_ENABLE     0x00444444u

// PINMUX for VPIF to selec ADC

#define PINMUX14_VALUE_ENABLE 0x11111111
#define PINMUX15_VALUE_ENABLE 0x11111111
#define PINMUX16_VALUE_ENABLE 0x11111111
#define PINMUX17_VALUE_ENABLE 0x11111111
#define PINMUX18_VALUE_ENABLE 0x00000011
#define PINMUX19_VALUE_ENABLE 0x00111100

Int32 configureUpp(Void)
{
    Int32          status       = IOM_COMPLETED;

    CSL_SyscfgRegsOvly sysCfgRegs = (CSL_SyscfgRegsOvly)CSL_SYSCFG_0_REGS;

    /*KICK0R and KICK1R registers needs to be enabled for this PINMUX setting *
     * to be successful. This needs to be ensured, by the bootloader or GEL   *
     * file, and should be done by only one entity else race conditions in    *
     * SYSCFG registers accesses could result                                 */

    /* configure the pinmux for the uPP device                                */
    sysCfgRegs->PINMUX13 &= ~(CSL_SYSCFG_PINMUX13_PINMUX13_19_16_MASK |
                              CSL_SYSCFG_PINMUX13_PINMUX13_23_20_MASK |
                              CSL_SYSCFG_PINMUX13_PINMUX13_27_24_MASK |
                              CSL_SYSCFG_PINMUX13_PINMUX13_31_28_MASK);

    sysCfgRegs->PINMUX14 &= ~(CSL_SYSCFG_PINMUX14_PINMUX14_3_0_MASK |
                              CSL_SYSCFG_PINMUX14_PINMUX14_11_8_MASK |
                              CSL_SYSCFG_PINMUX14_PINMUX14_15_12_MASK |
                              CSL_SYSCFG_PINMUX14_PINMUX14_19_16_MASK |
                              CSL_SYSCFG_PINMUX14_PINMUX14_23_20_MASK |
                              CSL_SYSCFG_PINMUX14_PINMUX14_27_24_MASK |
                              CSL_SYSCFG_PINMUX14_PINMUX14_31_28_MASK);

    sysCfgRegs->PINMUX15 &= ~(CSL_SYSCFG_PINMUX15_PINMUX15_3_0_MASK |
                              CSL_SYSCFG_PINMUX15_PINMUX15_7_4_MASK |
                              CSL_SYSCFG_PINMUX15_PINMUX15_11_8_MASK |
                              CSL_SYSCFG_PINMUX15_PINMUX15_15_12_MASK |
                              CSL_SYSCFG_PINMUX15_PINMUX15_19_16_MASK |
                              CSL_SYSCFG_PINMUX15_PINMUX15_23_20_MASK |
                              CSL_SYSCFG_PINMUX15_PINMUX15_27_24_MASK |
                              CSL_SYSCFG_PINMUX15_PINMUX15_31_28_MASK);

    sysCfgRegs->PINMUX16 &= ~(CSL_SYSCFG_PINMUX16_PINMUX16_3_0_MASK |
                              CSL_SYSCFG_PINMUX16_PINMUX16_7_4_MASK |
                              CSL_SYSCFG_PINMUX16_PINMUX16_11_8_MASK |
                              CSL_SYSCFG_PINMUX16_PINMUX16_15_12_MASK |
                              CSL_SYSCFG_PINMUX16_PINMUX16_19_16_MASK |
                              CSL_SYSCFG_PINMUX16_PINMUX16_23_20_MASK |
                              CSL_SYSCFG_PINMUX16_PINMUX16_27_24_MASK |
                              CSL_SYSCFG_PINMUX16_PINMUX16_31_28_MASK);

    sysCfgRegs->PINMUX17 &= ~(CSL_SYSCFG_PINMUX17_PINMUX17_3_0_MASK |
                              CSL_SYSCFG_PINMUX17_PINMUX17_7_4_MASK |
                              CSL_SYSCFG_PINMUX17_PINMUX17_11_8_MASK |
                              CSL_SYSCFG_PINMUX17_PINMUX17_15_12_MASK |
                              CSL_SYSCFG_PINMUX17_PINMUX17_19_16_MASK |
                              CSL_SYSCFG_PINMUX17_PINMUX17_23_20_MASK |
                              CSL_SYSCFG_PINMUX17_PINMUX17_27_24_MASK |
                              CSL_SYSCFG_PINMUX17_PINMUX17_31_28_MASK);

    sysCfgRegs->PINMUX18 &= ~(CSL_SYSCFG_PINMUX18_PINMUX18_3_0_MASK |
                              CSL_SYSCFG_PINMUX18_PINMUX18_7_4_MASK |
                              CSL_SYSCFG_PINMUX18_PINMUX18_11_8_MASK |
                              CSL_SYSCFG_PINMUX18_PINMUX18_15_12_MASK |
                              CSL_SYSCFG_PINMUX18_PINMUX18_19_16_MASK |
                              CSL_SYSCFG_PINMUX18_PINMUX18_23_20_MASK);
                              
    /* configure the pinmux for the VPIF device to enable ADC                  */

    sysCfgRegs->PINMUX14 &= ~(CSL_SYSCFG_PINMUX14_PINMUX14_3_0_MASK |
                              CSL_SYSCFG_PINMUX14_PINMUX14_7_4_MASK |
                                CSL_SYSCFG_PINMUX14_PINMUX14_11_8_MASK |
                              CSL_SYSCFG_PINMUX14_PINMUX14_15_12_MASK |
                              CSL_SYSCFG_PINMUX14_PINMUX14_19_16_MASK |
                              CSL_SYSCFG_PINMUX14_PINMUX14_23_20_MASK |
                              CSL_SYSCFG_PINMUX14_PINMUX14_27_24_MASK |
                              CSL_SYSCFG_PINMUX14_PINMUX14_31_28_MASK);

    sysCfgRegs->PINMUX15 &= ~(CSL_SYSCFG_PINMUX15_PINMUX15_3_0_MASK |
                              CSL_SYSCFG_PINMUX15_PINMUX15_7_4_MASK |
                              CSL_SYSCFG_PINMUX15_PINMUX15_11_8_MASK |
                              CSL_SYSCFG_PINMUX15_PINMUX15_15_12_MASK |
                              CSL_SYSCFG_PINMUX15_PINMUX15_19_16_MASK |
                              CSL_SYSCFG_PINMUX15_PINMUX15_23_20_MASK |
                              CSL_SYSCFG_PINMUX15_PINMUX15_27_24_MASK |
                              CSL_SYSCFG_PINMUX15_PINMUX15_31_28_MASK);

    sysCfgRegs->PINMUX16 &= ~(CSL_SYSCFG_PINMUX16_PINMUX16_3_0_MASK |
                              CSL_SYSCFG_PINMUX16_PINMUX16_7_4_MASK |
                              CSL_SYSCFG_PINMUX16_PINMUX16_11_8_MASK |
                              CSL_SYSCFG_PINMUX16_PINMUX16_15_12_MASK |
                              CSL_SYSCFG_PINMUX16_PINMUX16_19_16_MASK |
                              CSL_SYSCFG_PINMUX16_PINMUX16_23_20_MASK |
                              CSL_SYSCFG_PINMUX16_PINMUX16_27_24_MASK |
                              CSL_SYSCFG_PINMUX16_PINMUX16_31_28_MASK);

    sysCfgRegs->PINMUX17 &= ~(CSL_SYSCFG_PINMUX17_PINMUX17_3_0_MASK |
                              CSL_SYSCFG_PINMUX17_PINMUX17_7_4_MASK |
                              CSL_SYSCFG_PINMUX17_PINMUX17_11_8_MASK |
                              CSL_SYSCFG_PINMUX17_PINMUX17_15_12_MASK |
                              CSL_SYSCFG_PINMUX17_PINMUX17_19_16_MASK |
                              CSL_SYSCFG_PINMUX17_PINMUX17_23_20_MASK |
                              CSL_SYSCFG_PINMUX17_PINMUX17_27_24_MASK |
                              CSL_SYSCFG_PINMUX17_PINMUX17_31_28_MASK);

    sysCfgRegs->PINMUX18 &= ~(CSL_SYSCFG_PINMUX18_PINMUX18_3_0_MASK |
                              CSL_SYSCFG_PINMUX18_PINMUX18_7_4_MASK);

    sysCfgRegs->PINMUX19 &= ~(CSL_SYSCFG_PINMUX19_PINMUX19_11_8_MASK |
                              CSL_SYSCFG_PINMUX19_PINMUX19_15_12_MASK |    
                                CSL_SYSCFG_PINMUX19_PINMUX19_19_16_MASK |
                              CSL_SYSCFG_PINMUX19_PINMUX19_23_20_MASK);

    sysCfgRegs->PINMUX13 |= PINMUX13_UPP_ENABLE;
    sysCfgRegs->PINMUX14 |= PINMUX14_UPP_ENABLE;
    sysCfgRegs->PINMUX15 |= PINMUX15_UPP_ENABLE;
    sysCfgRegs->PINMUX16 |= PINMUX16_UPP_ENABLE;
    sysCfgRegs->PINMUX17 |= PINMUX17_UPP_ENABLE;
    sysCfgRegs->PINMUX18 |= PINMUX18_UPP_ENABLE;

    sysCfgRegs->PINMUX14 |= PINMUX14_VALUE_ENABLE;
    sysCfgRegs->PINMUX15 |= PINMUX15_VALUE_ENABLE;
    sysCfgRegs->PINMUX16 |= PINMUX16_VALUE_ENABLE;
    sysCfgRegs->PINMUX17 |= PINMUX17_VALUE_ENABLE;
    sysCfgRegs->PINMUX18 |= PINMUX18_VALUE_ENABLE;
    sysCfgRegs->PINMUX19 |= PINMUX19_VALUE_ENABLE;   

    /* Make DSP as the source of the emulation suspend.                       */
    sysCfgRegs->SUSPSRC |= (CSL_SYSCFG_SUSPSRC_UPPSRC_DSP <<
                                CSL_SYSCFG_SUSPSRC_UPPSRC_SHIFT);
    return (status);
}

How can I check if the above code has setup the peripheral properly ?

After configuring above code propely, I want to access the DMA registers for the uPP directly without using SIO_reclaim and SIO_issue functions. How can I do that ?

Thanks for your help.

-Tariq