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GPMC settings for 8 bit 8GByte Nand

Other Parts Discussed in Thread: AM3517

Hello,

Can somebody tell me the changes that need to be done to WINCE 7 BSP, to support 8 bit 8 GByte NAND. We are working on a EVM 8148 based custom board, the NAND device is from Toshiba (8 bit, 8GByte, Page size 8KB, 4124 pages per block, word size 1). We made some changes to the BSP to accommodate the NAND device connected on CS0 of GPMC, but have not been successful. The Read ID command is not successful. I have done the following

1. Changed the M_NAND_GPMC_CONFIG1 (CS0 reg), 12-13 bit to 0, for 8 bit device.

2. Included   the NAND ID details in the bspcfg.c    { //Toshiba

       0x98,
        0xDE,
        4124,//number of blocks
        256, //Sectors/pages per block
        8192, //page size, (8224 - redundant bytes = 8192), multiple of 1024 taken
        1
    }

3.  PIN CNTL 89 to 97 have been used(muxed) as I/O data lines. Other PINCNTL 98 to 104, have tried both disabling as well as using them as GPMC D[8-15].

4. GPMC CS0 pin mux has been enabled

The other timing parameters of CONFIG[2to7]_CS0 have not been changed, using the default values. With these chnages we are bale to see that CS0 has been enabled, but READID  returns  value of 0x17 for both Device and Manufacturer ID.

Regards

Pallavi