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5509a DMA Destination address

I am using DMA with EMIF, to receive data from a FPGA. In case my buff is full I would like to know where the destination address is pointing to.

How can I read the current destination address?

  • Look for followings

    Source Address Counter (DMACSAC) and Destination Address Counter (DMACDAC)

    Pankaj

  • Thank you!
    at first it did not work because our dsp was configured to 5509 instead of 5509a.
    (DMACSAC and DMACDAC are not supported in the first).
    the dma transfer 1 element - 16 bit, at a time. starting at address 0x08000.
    the buffer size is 0xFFFF.
    I have tried using the DMACDAC with the fallowing code:
    Uint16 dma_addr = DMA_RGETH (hDMA1, DMACDAC);
    by now a follow the pointer by initializing the buffer.
    I do not seem to know how to match the returned value dma_addr to my own results.
    what am is missing?
    is there any code example i can see?

  • I would recommend to monitor working registers of used DMA channel while debugging.

    I'm not sure if for 5509a support is provided to view peripheral registers. If its not use memory browser from View > Memory Browser

    and monitor relevant DMA channel's source/ destination address OR Source/Destination Address Counter (find address of these Reg in IO space).

    Also might be good idea to monitor Reg updates of these registers while single stepping in debug environment until "DMA_start(hDma);" statement.

    BTW you can find some DMA examples in "\C55xxCSL\examples\c5502\csl\dma"

  • Thanks again.
    With debugging over and over I noticed:
    1. the DMACDAC increases by 2. (which means the DMACDAC points to a byte).
    2. the DMACDAC skips from 0x4000 to 0xC000. any idea why this happens ?

  • Have look in "Synchronizing Channel Activity .." section in DMA ref guide.

    It mentions Non-event driven/event driven ports. In one of case DMA controller fills(read from source) its buffer before sync event and writes to destination on event. This is why address gets skipped while  DMA controller caches bytes from source.

    This can be cross checked by lowering no elements (e.g. 4-5 elements), on debug you would see both addresses will skip at same pace.

  • I have transferred one element at a time and still had the 'skipping' problem.

    for the time being I reduced buffer size to 0x3FFF and that solved my problems..

    Thanks.