Hello all,
I have recently been tasked to investigate some of the implementation of SRIO on our C6678 system, and originally the memory regions for SRIO are defined to be located within L2 memory. For potential future expansion (and flexibility), I am looking into moving this region into MSMCRAM and see if it can operate correctly.
When I attempt to complete a SRIO transaction with this, at times the initial transfer returns a completion code of -5 (which appears to signify a DMA data transfer error), and then the remaining transfers in the sequence return a timeout (-1).
The memory addresses being passed to the SRIO routines are located within MSMCRAM (0x1.....), being translated from their L2 addresses (0x08....).
My overall question is if what I am trying to do is possible, and what I may need to do to correct the issue. As it stands, I am still learning the basics of the SRIO interface, so if anything I stated is unclear (or if I missed anything of importance), just let me know.
