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Resetting Primary WDT in TWL6030

Other Parts Discussed in Thread: TWL6030

Hello All,

I am working with a custom OMAP4460 based platform using the TWL6030 PMIC chip.

The PMIC has a primary watchdog timer which times out every 32 seconds (by default).  It can also be programmed with a time out up to 127 seconds by loading a suitable value in PRIMARY_WATCHDOG_CFG.  This Primary WDT cannot be disabled.

I am programming the PRIMARY_WATCHDOG_CFG register of PMIC to set the timeout at 127 seconds.  The documentation for the TWL6030 that I have says that programming this register will automatically restart the WDT.  However, inpsite of having programmed the time out to 127 seconds, I am seeing that the board powers off (PMIC cuts off power to OMAP) after 32  seconds.

  • Has anyone worked with the PMIC with the primary WDT?
  • How can I ensure that the WDT restarts itself without cutting off power to OMAP or sending a reset to OMAP?

Any pointers on this issue will be very helpful.

Thank you for your time.

Warm regards,

Sanjay

  • Hi Sanjay,

    The primary watchdog counter is initialized with the PRIMARY_WATCHDOG_CFG register when NRESPWRON = 0 then the counter starts as soon as NRESPWRON is released, so if you are not setting the value on PRIMARY_WATCHDOG_CFG when NRESPWRON is 0 the change will not take effect in WDT.