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NAND ECC processing by UBL (DM365)

Hi!

Our version of UBL processes data from ECC registers in he following way (file device_nand.c): if number of errors allows correction, then data, containing information about error address are read from NANDERRADDn registers. Real error address is calculated by subtraction 519-(masked and shifted register value). Now, if obtained address is less then 512, that is error is located in the data field, correction process continues. If error address is higher, the program returns failure. Does error address above 511 mean that error is in "syndrom" field rather then in data field? If yes, why do we need to declare failure? If number of errors is acceptable, let's leave data as is; we can keep in mind that there is erroneous bit in spare bytes, but error correction code (Reed-Solomon , right?) detects wrong bits independently of their location( data or syndrom) does it?

Thanks,

German Baranov