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DM3730 Baremetal OFF Mode

Other Parts Discussed in Thread: DM3730

I'm working with a Logic PD 3730 Torpedo SOM and board.

Running Linux, it idles around 220mW and suspends to ~7mW.

I have a baremetal application I launch from X-Loader that also idles around 220mW, but I am unable to get it any lower.

It is clear that I'm not getting the CORE domain to power off.

Has anyone been able to get it to OFF mode in bare metal code ? The steps to follow in the TRM are very vague and don't appear to work (assuming I'm even close to executing them correctly...).

Thanks

  • Chandler,

    1. Have you dumped the PRCM module registers to see what are the different modules that are powered up? 

    2. Did you reduce the CPU frequencies during idle and tried?

    3. Are you planning to implement suspend mode?

    4. You can reduce the current consumption by powering off all unwanted peripherals from x-loader itself. Also you can try putting the RAM self-refresh mode during idle. You are using bare metal env, it will be easier to implement.

  • 1.  Yes, I've dumped all of the PRCM registers.  Checking the CLKSTST registers, _MPU shows a 1 (indicating domain clock active) and _CORE shows a 3 (L3 and L4 ICLKs active).  I assume these would need to be off ?

    2.  I've reduced the frequency to 300MHz by changing CM_CLKSEL1_PLL_MPU to 0x00112C0C  (this mirrors what appears to occur in Linux...is this correct ? )

    3.  Not 100% sure on suspend mode.  Our goal is lowest power with acceptable wakeup latencies. Haven't gotten far enough to test yet.

    4.  I haven't tried powering off peripherals in x-loader.  Currently my bare metal app starts up, modifies a bunch of registers to turn off everything possible, dumps registers, then does a WFI.  It then interrupts every 5 seconds using GPT1.  (I planned to use this as a wakeup timer for my testing, but it doesn't seem to be suspending/going to off mode...)  I believe I've set the RAM in self refresh by sending the commands in the TRM (1, 0, 5 for precharge all, NOP, enter self-refresh), but this didn't seem to change my power numbers. 

    I was able to drop another 20mW to idle at ~200 by turning off UART1's clocks after I finished dumping.  And in case this was preventing suspend, I also tried turning it off as well.

    Any thoughts ? Thanks

  • I might not be 100% correct. 

    1. Have you turned of all FCLK and ICLKs to most as well?

    2. I need to check the TRM to validate it. Have you tried running ARM it in bypass clock and saw the numbers?

    3. I have some different idea here, which I don't prefer to discuss over this forum. Could you please mail me @ renjith.thomas@pathpartnertech.com?

    4. What are the different peripherals available on your board? Are you keeping anything always ON? Is there flexibility in turning OFF them?

  • Hi Chandler,

    it looks like you have something downstream in the clock tree that is still active, that is preventing the L3 and L4 clocks to go idle.  I think analyzing the PRCM registers for anything that is active, as previously mentioned, is the way to debug this. 

    Additionally you can check out this link:  http://www.ti.com/pdfs/wtbu/CTT-OMAP3630ES1.x-v1.6.0.4.zip which is a clock tree tool.  This is a java based application which gives you a visual view of the full clock tree, which should help you identify what is keeping some of the interconnect clocks like L3 and L4 still active.  Note this is for the OMAP3630, but is applicable to the DM3730 which you are using

    Regards,

    James