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Hyperlink interruptions

Hi all,

I'm actually working on two C6678 connected together via Hyperlink. I would like to know if the end of an EDMA3 transfert can trigger an interrupt through hyperlink to inform the other DSP..

I already know that QMSS has 32 queues dedicated to hyperlink but if I use QMSS I have to use the packet DMA and I already made my code for EDMA3.

My use case is as follow:

I have a DSP A wich configure the EDMA3 of a DSP B (through hyperlink). For the moment, the transfert is very simple: the DMA transfers a word of 32 bits between L2SRAM of core 0 to MSM.

What I want to do now is to pass the interruption of the end of the DMA transfert through hyperlink to inform DSP A that the transfert is completed into DSP B.

If someone can tell me if it is possible or not it would be great.

Regards.

  • Hi Michael,

    Hyperlink has Generate Soft interrupt value register and user can trigger interrupt manually by SW when the local EDMA transfer is completed. this register has ivector field and this field means the index of Interrupt which was set by interrupt controller. you can get more detail about how to setup this interrupt from Hyperlink UG.

    Regards,

    Albert

  • Hi Albert,

    Thank you for your reply. I made changes in my post above and I add my use case.

    I pointed the fact that I control the DMA transfert of a DSP B using a DSP A.

    To be clear, the DSP A runs a software wich program a DMA transfert into the DSP B. 

    So, can I still have my interruption of end of DMA transfert trough hyperlink in my use case ?

    Regards.

  • In that case, you can set EDMA complete interrupt on DSP B and in the ISR of the EDMA completion interrupt, you can set Generate Soft Interrupt value register like I told you before and the Hyperlink of DSP B will transfer the interrupt signal to DSP A and DSP A CPU may know the completion of DMA on DSP B. for this, you need to spend more of your time to understand Hyperlink interrupt mechanism. See UG for more detail.

    Regards,

    Albert

  • Thank you Albert for that answer.

    I had few doubts on interrupts generation because it is written on C6678 UG that you can generate interrupts to hyperlink just from CIC3 or QMSS. So the schema was a little bit confused in my mind.

    I'll try to do it the way you explained.

    Regards.