I want to use cache in L2 but I don't know how much performance will get, Who can give me a general idea.
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
I want to use cache in L2 but I don't know how much performance will get, Who can give me a general idea.
A general idea is that your performance will improve a lot.
You can get some more specific ideas from our Application Notes. Go to TI.com, to the Support & Community, and to the Technical Documents link. Select from the drop-boxes on the left until you get to the Application Notes, and put in a word such as "benchmark" or "cache" (no quotes). Try other keywords to find other useful and interesting documents.
The best answer is to write a simple test program that has some similarity to what your application will do. Run that without cache enabled and run it again with cache enabled, and compare the cycle counts. You can use a Device simulator or your DSK.
Regards,
RandyP
For our particular application, we figured that "L2" SRAM was more useful as program+data RAM than as cache. We can get the same benefit as cache by copying whatever chunk of external SDRAM data we need to operate on to an SRAM buffer, operate on it there, and when done with that chunk, copy it back to external storage. The operations are the same as the cache subsystem's, but we can exercise more control.