Other Parts Discussed in Thread: OMAPL138
Hi E2Er's
On many DSPs when there is a DMA CPU memory contention - the way to resolve this is to seperate the code and data and place them in seperate memory locations. (On other TI DSP even if there was say 256kbyte SARAM the latter mechanism would work as internally the DSP could access 8kyte/4kbyte blocks independently almost as though each of these 8k/4k memory segments had its own dedicated DMA and CPU buses.)
Question is does ths work on OMAPL138 - ie is there a similar segmentation of the memory (DDR)? So if I placed CPU code at one end of DDR and DMA buffers at other would they still have contention issues ?
If the latter does not work - do I need to use the BWM ? Whats the best way to resolve such contentions ?
BR
Barry