We have a custom board with 2 6670 (rev 2.0) DSPs w/ 2GB of memory (Micron MT41J256M16RE-125). On the boards, the 2 DSPs are laid out exactly the same (just rotated 180 degrees). We are having problems w/ reliably reading/writing the DDR3. We basically have a brute force data read/write to all of the memory, and are experiencing random read/write errors. We have 3 boards, and on all 3 one DSP has read and/or write issues, and the other seems to be fine. On one board, the DSP w/ issues has random read and write problems, when that happens, it is usually in blocks, and always on byte lanes 0, 1, and 3. On another board it only has random read errors (usually isolated single reads) happening on the lower 4 lanes (0-3). On the third one, it also initially had random read errors, however once we implemented the Workaround 3 for the read eye training from the erratta, it seems to work fine (had no effect on the other boards).
My main question is, is there a way we can see the auto leveling results other than if any of the leveling times out in the STATUS register? Is there a way we could see what any of these "Autoleveling" values are, so we can compare the read eye training or gate training between DSPs or boards. I could not find any documentation on what the values are once the autoleveling is complete. We think having this information could help us determine if there is something in the initialization we doing wrong, or if there was some sort of board fabrication error. We're kind of taking shots in the dark as to what the issue could be.
Any information on this or other suggestions on how we could resolve this issue would be greatly appreciated.
Erick
