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NAND flash GPMC timing

I'm confused when calculating GPMC registers' values related to nand flash timing. I find it hard to match the timing diagrams in TRM and nand flash chip d/s.

If the nand flash is K9F5608U0B as the example below:

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0269a/CEGCHADB.html

How to calculate the parameters such as CSONTIME, CSRDOFFTIME, etc.

Can anybody help? Thanks in advance!

  • Hello,

    Have you checked section 7.1.3.9.1.1 of the TRM?  It explains the formulas to use to calculate NAND timing parameters.  Figure 7-44 is very similar to the drawings you linked above.  

  • Yes, I'v read through the TRM carefully. But how to convert the A, B, C, D... parameters in section 7.1.3.9.1.1 into registers parameters I need such as CSONTIME, WEONTIME.

    Thank you very much!

  • Hello Shane,

    Those values come from what you put into the registers.  CSONTIME bit-field is in GPMC_CONFIG2 register and WEONTIME bit-field is in GPMC_CONFIG4.  Please see the config registers for all the timing parameters.  

  • Oops, I his post before finishing my comments.

    For instance, from the K9F5608U0B data sheet in the AC Timing Characteristics for Command / Address / Data Input section it states that WE pulse width (twp) needs to be min 25ns.  Which is the A formula:

    A= (WEOFFTIME - WEONTIME)* TIMEPARAGRANULARITY +1)*GPMC_FCLK period

    If you are running the GPMC at 100MHz then you would just plug in the values to get 25ns for WE.  WEONTIME = 0, WEOFFTIME = 3, TIMEPARAGRANULARITY = 0

    (3-0)*(0+1)*10ns = 30ns

  • Thanks Jeff!

    So in order to meet the min 25ns, which is the A parameter in TRM, we need to set WEOFFTIME and WEONTIME in the registers GPMC_CONFIG2 and GPMC_CONFIG4.

    Is the value of WEONTIME=0 got from Figure 7-27? Then figure out WEOFFTIME=3 through A formula? Is my understanding right?

    Thanks and Best Regards,

    Shane

  • Shane,

    I based it off of the timing that you linked, but it is the same as fig 7-27.  To properly setup the timing you will need to take the timing requirements from the NAND you are using and then implement that in the AM35x config registers.  for the above example when I set up the "A" parameter (WE pulse duration).  In that example lets say it was a command latch cycle which is the first diagram from the link you provided.  in that you can see that the min WE pulse needs to be 25ns.  If you are running the GPMC at 100MHz (10ns cycle time) you know that you will need the WE to be low for 3 clocks.  The complete cycle is defined by WRCYCLETIME and we know that we need WE to go low at the beginning of the cycle so you need to set WEONTIME to be 0 that starts the WE pulse on the 0 clock of the cycle.  Since we need 3 clocks to get to 30ns we need to set WEOFFTIME to 3.  This needs to be done for all of the parameters based on the memory data sheet. 

  • Hi Jeff,

    Thanks for  the detailed explanation. I think I've understood how this be calculated. Thank you very much!

    Best Regards,

    Shane

  • Hi Jeff

        I have a problem in your calculation.

        Here you said:A= (WEOFFTIME - WEONTIME)* TIMEPARAGRANULARITY +1)*GPMC_FCLK period, is (3-0)*(0+1)*10ns = 30ns

    the problem is TIMEPARAGRANULARITY,when I set  TIMEPARAGRANULARITY bit to 0 ,I saw the TRM said that:

    TIMEPARAGRANULARITY: 0    ×1 latencies
                                                     1    ×2 latencies

    so when I'm calcuting A, I set TIMEPARAGRANULARITY=0, I must try (3-0)*(0+1)*10ns = 30ns or (3-0)*(1+1)*10ns = 60ns

           Best Regards,

          Xu