The mystical DDR2 problem occurs at 720MHz CPU and 266MHz DDR when I have adjacent bytes flipping all bits, i.e. going from 0xFFFF to 0x0000. Problem disappears when I lower DDR clock to 200MHz. Previously I had told Cary I lowered CPU frequency also --- that does not seem to be required. Anyway, I am reviewing the TI docs on the DDR registers ---- really interesting stuff.
