Hi, friends
I am using DM6467t. I used to set L2 to be alll SRAM without using DMA. So I think DSP's reading external memory speed is based on the external memory itself since L2 cache and DMA unable. To accelerate the reading speed , I want to use L2 cache.
I use CMEM to allocate a segment of memory 16M in size at base 0x88000000,which is aligned to L2 cache line size. And I configure L2 to be all cache, set MAR136 to be 1 which corresponds to 0x88000000 to 0x88FFFFFF.
But I see no improvement when DSP reads CMEM memory.
I am confused about the result. Dose L2 cache work for the segment used in CMEM? Or I missed something key to the L2 cache?
Can any one help me how to improve my reading efficiency?
Best regards
Xie