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8168 DSP Access to PCIe

Kassie Bowman
Prodigy 120 points

We are attempting to write to PCIe (0x2000 0000 - 0x2FFF FFFF) from the 8168 DSP.

Here is what I have gleaned from various forum posts on the matter:

http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/p/130665/468712.aspx#468712
The masters on this device that can access PCIe registers directly are the Cortex-A8 and EDMA.

http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/p/127968/462261.aspx#462261
The only masters that can access the PCIe Registers are the ARM Cortex-A8 and the EDMA; the DSP can access it via the DEMMU only

 http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/p/127968/484632.aspx#484632 
The PCIe on this device is accessible by ARM and EDMA only.  It is not feasible to access from the DSP.

The information above is conflicting; is it only possible to access the PCIe from the DSP via EDMA, or is it possible using DEMMU?  Or must the two be used in conjunction?

According to Figure 1-8 is the Tech Reference Manual (sprugx9), we should be able to access the L3 Interrconnect (including PCIe)  from the DSP via the DEMMU:

Which of the following are valid options for writing to the PCIe memory area from the DSP?  (The only thing that is clear from the above is the the DSP cannot directly access PCIe.)

  1. DSP --> EDMA --> PCIe
  2. DSP --> EDMA --> DEMMU --> PCIe
  3. DSP --> DEMMU --> PCIe
  • 0
    Guru 10685 points

    The DEMMU is broken on the DM8168 so you won't be using that.

    From my experience, PCIe is only accessible from the ARM and using EDMA.

    Ralph

  • 0 in reply to _Ralph_
    Prodigy 120 points

    Ralph,
    Thanks for the response.  Can you clarify what is broken with regards to the DEMMU?  Are you referring to the advisory from the silicon errata regarding the possibility of hanging in table-walk mode?

    Also, have you been successful in communicating with the PCIe via EDMA?  We have been attempting to use EDMA via the EDMA3 LLD, with code based on the provided example (found in {EDMA3_LLD_INSTALLDIR}\examples\edma3_driver\evmTI816x).  However, once we place the call to EDMA3_DRV_enableTransfer(), our callback function is never called with completion status and the write does not appear to take place.

    Kassie

  • 0 in reply to Kassie Bowman
    Guru 10685 points

    Hi Kassie,

    The broken thing is what is in the Advisory 2.0.34 to do with table walking. I am not aware of any TI code that uses the DEMMU on the DM8168. For instance, Codec Engine based applications only work if the DEMMU is left disabled (as it is by default after turn on).

    I have had EDMA working to/from the PCIe address space with the ARM in control of the PCIe with no problems at all, however I see you want to use the DSP.

    The difficulty lies, I think, in if you are trying to access prefetchable memory in the PCIe address space. Non-prefetchable shouldn't be a problem from the perspective of the DSP but not sure how you'd do prefetchable. There would have to be some caching checks and so on but it's not my area of expertise. So as a starting point I'd try to EDMA into/out of non-prefetchable PCIe memory.

    Ralph

  • 0 in reply to _Ralph_
    Prodigy 120 points

    Thanks for the information, Ralph.  We now have the EDMA writes to the PCIe address space working.  Our problem was caused by the MMU not allowing access to the EDMA configuration registers (0x4900 0000).  Once we enabled access, we were able to get the EDMA to work correctly to and from the PCIe address space.