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TMS320C6745 with codec AIC23

Other Parts Discussed in Thread: TMS320C6745

Hello,

                                We are using TMS320C6745 DSP. And try to configure Codec AIC23 with McASP0 port of DSP. We have successfully configured SPI port with codec AIC23 for configuration of AIC23 registers, it is ok.

Now we are configuring McASP0 of TMS320C6745 in I2S mode to digital audio communication. TMS320C6745 is in master mode and AIC23 is in Slave mode. DSP is generating 12.5MHz BCLK frequency and 390.635 KHz of FSCLK (LRCLK).

If we read value from receiver serializer and immediately pass to transmitter serializer then we get output at LINEOUT as same as input given at LINEIN of  AIC23.  if we do some calculation in between transmission and reception  then transmitter serializer is not ready to transmit any data and showing “underrun “ error in XSTAT register.  

We are using CCS V5. As 6745 and 6747 having the same core, we are using EVM6747 as a target and .gel file of the EVM6747. I am attaching C file of the program.

 

Does anyone have any information or guidance they can share in this regard?

Thanks,

Pravin

 

 

FINAL_McASP0_FORUM.rar
  • I had a little trouble opening your file.  However, I can guess what your issue is.  Have you enabled the FIFOs?  If not, I recommend it.  Also, for the transmitter you want to give it a couple buffers of zeros to begin with.  For example let's say that you're going to use buffers with 16 samples.  You would initially fill a transmit buffer with 16 samples of 0x0000.  While those samples are being transmitted you would simultaneously capture 16 samples.   At this point you are ready to process your data.  You want to AGAIN send another buffer of zeros out.  That way you can be sending another set of zeros while capturing a second set of data.  This is a standard "ping pong" buffer scheme where the driver "owns" one set of buffers and uses them for transmit/receive while the application owns the other set and can do its processing.  The application and driver swap buffers each time.

  • Ok, I will give C file without compressing, so will get it.

  • In my code I have only one channel for transmitting and receiving, that’s why I have configured McASP in I2S mode and slot1 for receiving frame and slot0 for transmitting frame.

    As per your suggestion I have configured FIFO registers, but I don’t know how to write and read from FIFOs. So, can you give me any sample code to read and write from receiver FIFO and transmitter FIFO respectively?

    The FIFO configuration registers are as follows.

    MCASP0_WFIFOCTL   = 0X00004001;

    MCASP0_RFIFOCTL   = 0X00004001;

    MCASP0_WFIFOCTL   |= 0X00010000;

    MCASP0_RFIFOCTL   |= 0X00010000;

     

  • Pravin,

    Refer to the responses from Brad and John on the forum thread below:

    http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/t/12178.aspx

    The Technical reference manual describes the process of writing to McASP FIFOs and the Hex address for FIFO can be found in the datasheet.

    Please let us know if you have any follow up questions.

    Regards,

    Rahul

  • I see you're currently setting the FIFO RNUMEVT/WNUMEVT to 64 words.  That will consume the entire FIFO.  Typically one would set the threshold to half of the FIFO depth, i.e. 32 words (FIFOCTL = 0x00002001).

    To read/write the FIFO you will want to point the EDMA toward the address in the memory map called "McASP 0/1 Data" (see Table 2-4 "Top Level Memory Map" of the Data Manual).  You will need to set ACNT equal to the data size and BCNT equal to NUMEVT (which again I recommend setting as 32 words).

    Finally, to use the DMA port you must make sure to program XBUSEL = RBUSEL = 0.