Dear All,
I am facing a peculiar problem with DSP DPLL2 lock mechanism.
During normal operation mode, I am able to put DPLL2 in bypass mode, set M2, M and N values and then lock it.
However If DPLL2 is enabled for AutoIdle mode (Set Bit[2-0] to value 0x1 in register CM_AUTOIDLE_PLL_IVA2) then DSP DPLL2 lock does not happen (Above mentioned sequence is followed). However if any video playback is happening then lock does happen irrespective of AutoIdle bit set/reset condition.
Has anyobdy faced similar issues? I wanted to understand why AutoIdle bit setting prevents DSP DPLL2 to from locking?
Looking for a thoughtful answers on this.
Regards,
~Ajit
