• State
  • Locked Locked
  • Replies 1 reply
  • Subscribers 98 subscribers
  • Views 596 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

McASP clock signals (slave mode)

schoerkhuber
Prodigy 20 points

Hi,

I want to capture audio data from a custom made 4-channel ADC-board with the beaglebone via McASP0. I want the beaglebone to be the clock-slave, so frame-sync (AFSR) and bitclock (ACLKR) are provided by the ADC. What I don't quite get is the role of the McASP's high frequency clock pin (AHCLKR). 
If I use a 4-slot TDM, a slot-width of 32 bit and a sampling frequency of 48 kHz the bitclock-frequency is 6,144 MHz. What would be the frequency of the high-frequency clock (AHCLKR) and why is it needed anyway?. That is, do I need to provide the high frequency clock on the AHCLKR bin when the frame-sync and bitclock are set to slave mode?
My second question concerns the frame-sync format: In the Receive Frame Sync Control Register (AFSRCTL) the frame sync can be set to either single bit or single word. Problem is, that the frame-sync provided by the ADC exhibits a so-called 50/50 format (rising edge at the beginning of slot 0 and falling edge at the end of slot1 using a 4-slot TDM). Can I get away with this format when  the receive frame-sync is in slave mode (e.g. only the first edge indicating the beginning of the frame is considered)?   
regards,
Christian
  • 0
    Intellectual 595 points

    Hi Christian,

    I stumbled over your question, as I am also working on the beaglebone McASP. So don't expect perfect answers, however maybe I can explain you some stuff.The role of the AHCLKR is, that you need to configure the clock as input per SPRUH73F page 3963, if you want to have the Sitara as the clock slave. The same applies to the AFSR respectively.

    The McASP peripheral is quite flexible regarding the format, especially if you are using TDM. I assume, that you should also refer to the TRM, to get a deeper inside in the I2S specifications.

    Have fun, Klaus