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AM3352 Analog input Pins and Ethernet Pins

Rizwan Hirani
Intellectual 450 points
Other Parts Discussed in Thread: AM3352

Folks,

I am designing one of our board using AM3352, I have got two issues,

1. What to do with AIN [7:0] --- if they are unused ? Can it be left floating or need to be tied to ground. ? can I tie them to ground using one common resistor ?

2. Second one is bit tricky ..

I am planning to use RGMII inteface of the AM to connect to my ethernet switch -- 88E6161 & for that I am connecting RX pins from processor side to RGMII output of Switch & Those output  pins are muxed with some mode configuration pins of switch in order to selec RGMII mode I have to connect them to some pull up and pull down based on setting specified in the datasheet of the switch.. so during reset it will get latched and switch will function in RGMII mode.. I have system reset connected to ETH Swithc, which is also used to reset the processor..

if I see the table 2-7, as per that all RGMII RX Pins are "low" during reset and "low" after reset is released.. so I am kind of stuck since I whatever strap I have put will get override by the AM3352..

Is there any solution of this issue ? did any body encounter this earlier ? 

Either I have to use some buffer/switch which will connect straps during reset and after that it will connect processors pins to Switch or I have to used some different where mode pins are not muxed ..but if I use buffer i need to be very careful since the timing of the RGMII are bit stringent ..

Please let me know if any easy solution for this problem is available ..

Thanks,

Rizwan Hirani

  • 0
    Intellectual 450 points

    Table 2-7 of AM3352 data sheet.. RGMII Pins M16, L15, 16, 17

  • 0
    Prodigy 165 points

    The unused AIN pins can be tied to ground using one common resistor. Or they can be tied directly to ground.

    I don't know of an easy solution for the second issue.

    best regards,

    Stephanie

  • 0 in reply to Stephanie Goedecke
    TI__Guru 63175 points

    1.
    The recommendation for connecting unused ADC pins is provided in the AM335x schematic checklist.

    http://www.ti.com/general/docs/lit/getliterature.tsp?literatureNumber=sprabn2&fileType=pdf

    If ADC is not used...
    • Connect the VREFP, VREFN, AIN[7:0], and VDDA_ADC terminals to ground.

    2.
    The AM335x pins used for RGMII are only pulled low with a weak internal resistor during and after reset.  Please read the BALL RESET STATE and BALL RESET REL. STATE descriptions in section 2.2 of the AM335x Data Sheet.

    One option is to add external pull-up resistors to force a valid high logic level on each RMII signal that need to be pulled high.  Please use the maximum input  leakage current of the respective AM335x pin when calculating the external resistor value required to pull these signals to a valid high logic level.

    Another option would be to use a GPIO to source the Ethernet switch reset.  This would allow software to turn off the respective AM335x internal resistors before releasing reset to the Ethernet switch.  This will allow you to use higher value resistors on these signals which may provide lower power consumption.

    Note: If you are connecting the Ethernet switch directly to the AM335x, you need to make sure the Ethernet switch is able to operate in PHY mode.  The AM335x Ethernet ports expect a PHY to be connected rather than another MAC.  Therefore, the switch must look like a PHY to the AM335x device. 

    Regards,
    Paul

  • 0 in reply to peaves
    Intellectual 450 points

    Thanks Paul.

    For point 1, I corrected my design

    For point 2, as per table 3-7 of the datasheet the maximum leakage current is 240uA, thus I have decided to Put 1K pullup resistor to override internal pull down. During prototype if power consumption is higher than I would , control the reset of switch using one of AM3352 GPIO and before releasing reset I would configure RGMII pins in GPIO mode with expected strap set as output and then release the reset and configure those pin again in RGMII..

    thanks for the help.

    BR,

    Rizwan

  • 0 in reply to Rizwan Hirani
    TI__Guru 63175 points

    The default configuration for the terminals you listed should have a maximum leakage of 170uA when VDDSHV5 is 1.8 volts and 210uA when VDDSHV5  is 3.3 volts and the internal pull-down resistors are turned on.  However, the maximum leakage reduces to 5uA when VDDSHV5 is 1.8 volts and 18uA when VDDSHV5  is 3.3 volts and the internal pull-down resistors are turned off.

    You should not set these AM335x terminals to output mode when using the GPIO reset method because the Ethernet  PHY expects these signals to be held in a known state until reset is released but the PHY begins driving these signals as soon as reset is released.  So it may not be possible to turn off the AM335x outputs before the PHY begins driving these signals.

    I recommend you use external resistors with a calculated value that is low enough to pull the voltage below the PHY Vil max or PHY Vih min (valid logic levels) with the maximum combined input leakage of the AM335x and PHY inputs.  Use one of the AM335x GPIOs that defaults to PHY reset logic state to control the PHY reset.  This will hold the PHY in reset when power is applied.  Once you boot, turn off the respective internal pull-down resistors in AM335x but leave them in input mode.  This will allow the external resistors to pull the PHY boot strap pins to the expected state.  Then you can release the PHY reset with the AM335x GPIO.  This will prevent the possibility of contention on these signals.

    Regards,
    Paul