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C6670 questions

Other Parts Discussed in Thread: CDCM6208, UCD74111, UCD9222, UCD9244, LM10011, LM10010, TPS56121, UCD9090, CDCE62005, CDCE62002

1) Does TI publish a chip-level power management solution for the C6670?   TI’s C6670 webpage links to http://www.ti.com/tool/pmp7256#tiDevice – Is this for the variable (0.9 to 1.05V) input or fixed 1.0V input supply?   They also describe another solution for variable core supply in section 5.7 of Keystone Hardware Design Guide (sprabi2b).

 

2) Does TI publish a clocking solution for the recommend input clock frequencies?       The Hardware Design Guide (sprabi2b) gives the recommend clock frequencies (Table5) and suggests using CDCM6208 to generate them.   However, it seems strange that the pre-configured settings of CDCM6208 don’t match the DSP’s recommended frequencies.   To get those recommended settings, we’ll need to program the CDCM6208, and worry about sequencing, etc.    It would be much simpler if they were pre-configured.

 

3) Is the C6670 compatibility with the new Micron DDR3 MT41K256M32, a x32-bit wide, 8Gb part.    Note: this is a TwinDie DDR3 chip with two x16-bit, 4Gb dies (which is compatible) -- so I’m wondering why wouldn’t a TwinDie version work.

  •  Mark,

    There are basically 2 solutions: one with digital control which is flexible and full featured and one with analog control which is lower cost.  The digital solution uses either a UCD9222 dual controller or a UCD9244 quad controller.  The first channel is connected to a UCD74111 power stage and this is controlled through the VCNTL pins to support the Smart Reflex.  The remaining channel(s) can then be used for other fixed supply rails.  The reference design for this solution is implemented on the C6670 EVM.

    The analog solution for the Smart Reflex uses the LM10011 and a TPS56121 as shown in the reference design PMP7256.  This design shows the LM10010 but we are recommending the LM10011 for all new designs.  Other TPS54xxx and TPS56xxx supplies can be used for the other supply rails.

    Power supply sequencers such as the UCD9090 are useful for either solution and can be used to support the required clock and reset sequencing as well.

    The CDCE62005 and CDCE62002 clock generators shown on the EVM are recommended for the C6670.  These also need to be programmed.  They contain FLASH memory that can be programmed prior to assembly or as part of the production process.  They can also be programmed at run-time by a uC.

    I am not familiar with the new 32-bit DDR3 DRAM from Micron.  We support all JEDEC-compliant DDR3 SDRAM and I am sure this one is.  We have used Micron DRAMs with C6670 and so do some of our customers.  The 32-bit arrangement should be no different than implementing a pair of x16 SDRAMs.

    Tom

     

  • Mark,

    This part MT41K256M32-125 was EOL a month ago.

    Patrick