Hi all,
I'm working on a video application based on a custom board provided with a DM642 600Mhz DSP. I'm experiencing some performance issues due to EDMA overload, or a t least this is my opinion at the moment.
I'm using Vport2 as a BT656 input capture port, Vport0 as a BT656 display port. Both of them needs 3 EDMA channels for Y,Cb and Cr data to be fed to the proper FIFO.
Another EDMA channel is used to retrieve data from an external component connected to EMIFA CE2, and the load is about 1Mbps. Finally the same burden of 1Mbps is sent over the Mcbps with a dedicated EDMA channel.
The system is provided with a 133Mhz SDRAM used to allocate the video capture and display frame buffers, and the other aforementioned data streams.
If the system runs with only the capture/display code it all works fine, but if the Mcbsp and the other EDMA channels are activateed the system begin to report sporadic capture fifo overrun.
This appens if the EMIF and McBsp EDMA are loaded over the 40kpbs threshold.
..The application is written on the top of the DSP/BIOS OS. The captured/displayed video is a PAL 625/50 video.
In my opinion the system should work with an EDMA load of this entity, is this correct? ..or the use of two simultaneous video port doesnt' allows to allocate further EDMA channels?
